Patents by Inventor Grady A. Miller, Jr.

Grady A. Miller, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5296652
    Abstract: A method and apparatus are provided for mounting a circuit component such as a gate array device 12 on a printed circuit board 14. The component 12 may include a plurality of pin-type electrical contacts 18 wherein a first portion of the pin-type contacts 18 have been replaced by button-type contacts. In one embodiment, at least two of the pin-type contacts 22, 24 have been retained and serve the dual purpose of locating the gate array device 12 on the printed circuit board 14 and attaching the gate array device 12 to the printed circuit board 14. A sheet of boron nitride 26 is positioned between the printed circuit board 14 and the circuit component, e.g., the gate array device 12. The sheet of boron nitride 26 includes a plurality of openings extending therethrough in a pattern corresponding to the pattern of electrical contacts 18 on the gate array device 12. The openings 32 in the sheet of boron nitride 26 that correspond to the button-type contacts have resilient electrical contacts 34 disposed therein.
    Type: Grant
    Filed: April 30, 1992
    Date of Patent: March 22, 1994
    Assignee: Loral Vought Systems Corporation
    Inventor: Grady A. Miller, Jr.
  • Patent number: 5155905
    Abstract: A method and apparatus are provided for mounting a gate array device 12 on a printed circuit board 14. The device 12 includes at least two pin-type electrical contacts 22, 24 and a plurality of button-type contacts. A sheet of boron nitride 26 is positioned between the printed circuit 14 and the gate array device 12. The sheet of boron nitride 26 includes a plurality of openings extending therethrough in a pattern corresponding to the pattern of electrical contacts 18 on the gate array device 12. The openings 32 in the sheet of boron nitride 26 have resilient electrical contacts 34 disposed therein. The printed circuit board 14 includes a plurality of button-type contacts 40 disposed on a surface thereof in a pattern corresponding to the button-type contacts of the gate array device 12 and the resilient electrical contacts 34.
    Type: Grant
    Filed: May 3, 1991
    Date of Patent: October 20, 1992
    Assignee: LTV Aerospace and Defense Company
    Inventor: Grady A. Miller, Jr.
  • Patent number: 5059130
    Abstract: A system of printed circuit boards is interconnected by using connectors having electrically conductive assemblies that include both pins and sockets. The pins of the assemblies of one connector pass through apertures in the printed circuit boards and engage the sockets of assemblies of another connector on the other side of the printed circuit board. In this manner any number of printed circuit boards may be interconnected to form continuous electrical circuits from one printed circuit board to the next and also provide a mechanical means of holding the system of printed circuit boards together.
    Type: Grant
    Filed: May 11, 1990
    Date of Patent: October 22, 1991
    Assignee: LTV Aerospace and Defense Company
    Inventor: Grady A. Miller, Jr.
  • Patent number: 4950170
    Abstract: A system of printed circuit boards is interconnected by using connectors having electrically conductive assemblies that include both pins and sockets. The pins of the assemblies of one connector pass through apertures in the printed circuit boards and engage the sockets of assemblies of another connector on the other side of the printed circuit board. In this manner any number of printed circuit boards may be interconnected to form continuous electrical circuits from one printed circuit board to the next and also provide a mechanical means of holding the system of printed circuit boards together.
    Type: Grant
    Filed: June 23, 1988
    Date of Patent: August 21, 1990
    Assignee: LTV Aerospace & Defense Company
    Inventor: Grady A. Miller, Jr.
  • Patent number: 4868980
    Abstract: A printed circuit board for mounting and connecting a plurality of semiconductor devices is disclosed and includes a planar insulating substrate having multiple conductive layers disposed in overlying relationship within the planar substrate. A plurality of parallel rows of apertures for wire-wrap, quick-connect or stitch-wire contacts are provided for mounting integrated circuits. One side of the printed circuit board includes a plurality of power and ground connections disposed between each pair of parallel rows of apertures so that filter capacitors may be mounted under each integrated circuit, thereby conserving printed circuit board space. In a preferred mode of the present invention, alternate ones of the conductive layers are coupled to a source of electrical power while all remaining conductive layers are grounded. At least two adjacent conductive layers are then utilized to minimize parasitic capacitance by completely surrounding each aperture with a portion of conductive material.
    Type: Grant
    Filed: July 12, 1988
    Date of Patent: September 26, 1989
    Assignee: LTV Aerospace & Defense Company
    Inventor: Grady A. Miller, Jr.
  • Patent number: 4842184
    Abstract: A method of applying solder to contacts of a connector, when the contacts are spaced apart according to a given arrangement. The method includes the steps of perforating a water-soluble adhesive material to form perforations in a pattern according to the given arrangement, applying solder preforms around the perforations, positioning the adhesive material to center the solder preforms around the contacts, washing off the adhesive material with water, and heating the contacts to the flow-point temperature of the solder.
    Type: Grant
    Filed: June 23, 1988
    Date of Patent: June 27, 1989
    Assignee: LTV Aerospace & Defense Company
    Inventor: Grady A. Miller, Jr.
  • Patent number: 4791722
    Abstract: A printed circuit for mounting and connecting a plurality of semiconductor devices is disclosed and includes a planar insulating substrate having multiple conductive layers disposed in overlying relationship within the planar substrate. A plurality of parallel rows of apertures for wire wrap, quick connect or stitch wire contacts are provided for mounting integrated circuit. One side of the printed circuit board includes a plurality of power and ground connections disposed between each pair of parallel rows of apertures so that filter capacitors may be mounted under each integrated circuit, thereby conserving printed circuit board space. In a preferred mode of the present invention, alternate ones of the conductive layers are coupled to a source of electrical power while all remaining conductive layers are gounded. At least two adjacent conductive layers are then utilized to minimize parasitic capacitance by completely surrounding each aperture with a portion of conductive material.
    Type: Grant
    Filed: December 23, 1986
    Date of Patent: December 20, 1988
    Assignee: LTV Aerospace and Defense Co.
    Inventor: Grady A. Miller, Jr.