Abstract: Disclosed herein are hydraulic actuators and methods for the operation of actuators having variable relative pressure ratios. Further disclosed are methods for designing and/or operating a hydraulic actuator such that the actuator exhibits a variable relative pressure ratio. In certain embodiments, the relative pressure ratio of the hydraulic actuator may be dependent on one or more characteristics (such as, for example, frequency or rate of change) of an oscillating input to the hydraulic actuator.

Abstract: Provided herein are compounds binding to KRAS protein or a mutant thereof, pharmaceutical compositions comprising said compounds, and methods for using said compounds for the treatment of diseases.

Abstract: Methods, systems, and techniques for agricultural greenhouse gas estimation. Farm data in the form of at least one of revenue generated by a farm, crop information for one or more crops grown on the farm, and land use/farm practice data for land used on the farm to grow the one or more crops is obtained. An emissions estimate is determined based on the obtained data and caused to be displayed to the user via a graphical user interface. A user may be a person responsible for managing multiple farms. That user may be presented with aggregate emissions-related information for all farms, including projected future emissions under various scenarios, and may also iteratively experiment with different farm data values in order to attempt to reduce projected emissions or increase data quality/emissions estimate accuracy.

Abstract: A peripheral device, for use with a host, comprises one or more compute elements a security module and at least one encryption unit. The security module is configured to form a trusted execution environment on the peripheral device for processing sensitive data using sensitive code. The sensitive data and sensitive code are provided by a trusted computing entity which is in communication with the host computing device. The at least one encryption unit is configured to encrypt and decrypt data transferred between the trusted execution environment and the trusted computing entity via the host computing device. The security module is configured to compute and send an attestation to the trusted computing entity to attest that the sensitive code is in the trusted execution environment.

Abstract: A method for debugging a processor which is executing vertices of a software application is described. Each vertex is assigned to a programming thread of the processor. The processor has debug hardware for raising exceptions in certain break conditions. The method comprises inspecting a vertex identifier, comparing the vertex identifier and raising an instruction exception event for the programming thread if the vertex identifier assigned to the thread matches the vertex break identifier in the debug hardware. Exceptions are raised based on identified vertices, rather than just individual instructions or instruction addresses.

Abstract: A processor comprising at least one processing module, each processing module comprising: an execution pipeline; memory; an instruction fetch unit comprising operable to switch between an operational mode and a debugging mode, the instruction fetch unit being configured so as, when in the operational mode, to fetch machine code instructions from the memory into the execution pipeline to be executed; and a debug interface for connecting to a debug adapter. The debug interface comprises a debug instruction register enabling the debug adapter to write a machine code instruction to the debug instruction register, and wherein the instruction fetch unit is configured so as, when in the debug mode, to fetch instructions from the debug instruction register into the pipeline instead of from the memory.

Abstract: A computer-based apparatus for managing data based on performance of an underlying securities index including a memory element of a computer configured to store computer executable instructions and a processor for the computer, configured to execute the computer readable instructions to receive information on a lower buffer threshold against losses for an investment, and determine a total return on the investment during an outcome period o, wherein the total return is adjusted to fall above the buffer threshold.

Abstract: Two or more die are stacked together in a stacked integrated circuit device. Each of the processors on these die is able to communicate with other processors on its die by sending data over the switching fabric of its respective die. The mechanism for sending data between processors on the same die (i.e. intradie communication) is reused for sending data between processors on different die (i.e. interdie communication). The reuse of the mechanism is enabled by assigning each processor a vertical neighbour on its opposing die. Each processor has an interdie connection that connects it to the output exchange bus of its neighbour. A processor is able to borrow the output exchange bus of its neighbour by sending data along the output exchange bus of its neighbour.

Abstract: A multitile processing system has an execution unit on each tile, and an interconnect which conducts communications between the tiles according to a bulk synchronous parallel scheme. Each tile performs an on-tile compute phase followed by an intertile exchange phase, where the exchange phase is held back until all tiles in a particular group have completed the compute phase. On completion of the compute phase, each tile generates a synchronisation request and pauses an issue of instructions until it receives a synchronisation acknowledgement. If a tile attains an excepted state, it raises an exception signal and pauses instruction issue until the excepted state has been resolved. However, tiles which are not in the excepted state can continue to perform their on-tile computer phase, and will issue their own synchronisation request in their own normal time frame.

Abstract: Methods are provided for the adjuvant treatment of operable HER2-positive primary breast cancer in human patients by administration of pertuzumab in addition to chemotherapy and trastuzumab. The methods reduce the risk of recurrence of invasive breast cancer or death for a patient diagnosed with HER2-positive early breast cancer (eBC) compared to administration of trastuzumab and chemotherapy, without pertuzumab.

Abstract: A self-supporting film (10) comprises a gas barrier layer (20); a semi-permeable layer (40); and an indicator material (30), preferably a colorimetric indicator material, is provided between the gas barrier layer (20) and the semi-permeable layer (40). The indicator material (30) is in direct contact with the gas barrier layer (20). The film (10) is particularly useful as an item of packaging, particularly in packaging for perishable materials.

Abstract: For certain applications, parts of the application data held in memory of a processing device (e.g. that are produced as a result of operations performed by the execution unit) are arranged in regular repeating patterns in the memory, and therefore, the execution unit may set up a suitable striding pattern for use by a send engine. The send engine accesses the memory at locations in accordance with the configured striding pattern so as to access a plurality of items of data that are arranged together in a regular pattern. In a similar manner as done for sends, the execution may set up a striding pattern for use by a receive engine. The receive engine, upon receiving a plurality of items of data, causes those items of data to be stored at locations in the memory, as determined in accordance with the configured striding pattern.

Abstract: An automated machine learning approach and toolkit is developed for evaluating the causal impact of an event. This approach includes data generation, optimal model selection, model stability evaluation and model explanation. An example approach includes: generating predictive output data of physical geospatial objects is proposed whereby a first data set representative of geospatial event-based data and a second data set representative of the characteristics of the physical geospatial objects are spatially joined together and utilized to generate a causal graph data model that is then provided for at least one of a trained regression machine learning model, a trained causal machine learning model, and a trained similarity machine learning model to generate the predictive output data representative of event-adjusted characteristics of the physical geospatial objects.

Abstract: The present invention relates a method for increasing the shelf life of fruit comprising the steps of: treating a fruit with UV light from a UV light source, packaging the fruit in packaging film that allows the fruit to be stored in a modified atmosphere within said film, and storing the packaged fruit.

Abstract: A processing system comprising multiple tiles and an interconnect between the tiles. The interconnect is used to communicate between a group of some or all of the tiles according to a bulk synchronous parallel scheme, whereby each tile in the group performs an on-tile compute phase followed by an inter-tile exchange phase with the exchange phase being held back until all tiles in the group have completed the compute phase. Each tile in the group has a local exit state upon completion of the compute phase. The instruction set comprises a synchronization instruction for execution by each tile upon completion of its compute phase to signal a sync request to logic in the interconnect. In response to receiving the sync request from all the tiles in the group, the logic releases the next exchange phase and also makes available an aggregated a state of all the tiles in the group.

Abstract: A processing system comprising an arrangement of tiles and an interconnect between the tiles. The interconnect comprises synchronization logic for coordinating a barrier synchronization to be performed between a group of the tiles. The instruction set comprises a synchronization instruction taking an operand which selects one of a plurality of available modes each specifying a different membership of the group. Execution of the synchronization instruction cause a synchronization request to be transmitted from the respective tile to the synchronization logic, and instruction issue to be suspended on the respective tile pending a synchronization acknowledgement being received back from the synchronization logic. In response to receiving the synchronization request from all the tiles in the group as specified by the operand of the synchronization instruction, the synchronization logic returns the synchronization acknowledgment to the tiles in the specified group.

Abstract: A processor is disclosed including: a barrel-threaded execution unit for executing concurrent threads, and a repeat cache shared between the concurrent threads. The processor's instruction set includes a repeat instruction which takes a repeat count operand. When the repeat cache is not claimed and the repeat instruction is executed in a first thread, a portion of code is cached from the first thread into the repeat cache, the state of the repeat cache is changed to record it as claimed, and the cached code is executed a number of times. When the repeat instruction is then executed in a further thread, then the already-cached portion of code is again executed a respective number of times, each time from the repeat cache. For each of the first and further instructions, the repeat count operand in the respective instruction specifies the number of times to execute the cached code.

Abstract: Methods are provided for the adjuvant treatment of operable HER2-positive primary breast cancer in human patients by administration of pertuzumab in addition to chemotherapy and trastuzumab. The methods reduce the risk of recurrence of invasive breast cancer or death for a patient diagnosed with HER2-positive early breast cancer (eBC) compared to administration of trastuzumab and chemotherapy, without pertuzumab.

Abstract: A method for debugging a processor which is executing vertices of a software application is described. Each vertex is assigned to a programming thread of the processor. The processor has debug hardware for raising exceptions in certain break conditions. The method comprises inspecting a vertex identifier, comparing the vertex identifier and raising an instruction exception event for the programming thread if the vertex identifier assigned to the thread matches the vertex break identifier in the debug hardware. Exceptions are raised based on identified vertices, rather than just individual instructions or instruction addresses.

Abstract: A processor having an instruction set including a load-store instruction having operands specifying, from amongst the registers in at least one register file, a respective destination of each of two load operations, a respective source of a store operation, and a pair of address registers arranged to hold three memory addresses, the three memory addresses being a respective load address for each of the two load operations and a respective store address for the store operation. The load-store instruction further includes three stride operands each specifying a respective stride value for each of the two load addresses and one store address, wherein at least some possible values of each stride operand specify the respective stride value by specifying one of a plurality of fields within a stride register in one of the one or more register files, each field holding a different stride value.