Patents by Inventor Graham B. Stott

Graham B. Stott has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7590885
    Abstract: A method and system of copying memory from a source processor to a target processor by duplicating memory writes. At least some of the exemplary embodiments may be a method comprising stopping execution of a user program on a target processor (the target processor coupled to a first memory), continuing to execute a duplicate copy of the user program on a source processor (the source processor coupled to a second memory and generating writes to the second memory), duplicating memory writes of the source processor and duplicating writes by input/output adapters to create a stream of duplicate memory writes, and applying the duplicated memory writes to the first memory.
    Type: Grant
    Filed: April 26, 2005
    Date of Patent: September 15, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Thomas J. Kondo, Robert L Jardine, William F. Bruckert, David J. Garcia, James S. Klecka, James R. Smullen, Jeff Sprouse, Graham B. Stott
  • Patent number: 6948092
    Abstract: A computer system includes a primary processor and a secondary processor running in lockstep. The lockstep may or may not be synchronous. Errors occurring in the primary processor or the secondary processor are reported to an error-handling module. If the error is a recoverable error, the state of one of the processors is saved and the processors are restarted using the saved state. In addition to the reporting of errors from the processors, cross checking of the operation of the processors is performed to detect a divergence in the operation of the processors. If the divergence is reported to be due to a recoverable error, the state of the one of the processors is saved and the processors are restarted using the saved state. Procedures are also disclosed to ensure that data corruption does not propagate onto an associated network, and to ensure that the system is not lost as a network resource during processor restart.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: September 20, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Thomas J. Kondo, James S. Klecka, Robert L. Jardine, William P. Bunton, Graham B. Stott
  • Publication number: 20020144177
    Abstract: A computer system includes a primary processor and a secondary processor running in lockstep. The lockstep may or may not be synchronous. Errors occurring in the primary processor or the secondary processor are reported to an error-handling module. If the error is a recoverable error, the state of one of the processors is saved and the processors are restarted using the saved state. In addition to the reporting of errors from the processors, cross checking of the operation of the processors is performed to detect a divergence in the operation of the processors. If the divergence is reported to be due to a recoverable error, the state of the one of the processors is saved and the processors are restarted using the saved state. Procedures are also disclosed to ensure that data corruption does not propagate onto an associated network, and to ensure that the system is not lost as a network resource during processor restart.
    Type: Application
    Filed: January 31, 2002
    Publication date: October 3, 2002
    Inventors: Thomas J. Kondo, James S. Klecka, Robert L. Jardine, William P. Bunton, Graham B. Stott