Abstract: An arrangement (6) for encrypting/decrypting data includes a random access memory (12) for holding the data and a processor (10) for processing the data. The processor includes a memory map including a first portion (12.0) mapped onto the random access memory and a second portion (12.1). The processor further includes control means (18, 34, 26) coupled to receive all instruction to write data to an address in the second portion of the memory map and in response thereto to write the data in a predetermined permuted form to an associated address in the random access memory. The data read from said associated address in the random access memory is an encrypted/decrypted version of the data written to said address in the second portion of the memory map.

Abstract: A light detection device has a biasing transistor (1) arranged to provide a bias current and a reverse biased transistor. The reverse biased transistor has a drain terminal (6) coupled via a high impedance resistor (4) to the supply voltage. Incident visible light is detected by a voltage drop at the drain electrode.