Patents by Inventor Graham N. Turner

Graham N. Turner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4807161
    Abstract: An automatic test equipment for the functional testing of electrical printed circuit board assemblies is constructed as the combination of a programmable controller based upon a microcomputer and selected interface modules which can be plugged into the controller system backplane in any of a number of module interconnection locations and in any combination of module types with the controller being adapted to interrogate the modules as to their type and location and organize its routines accordingly. The controller has an advantageous bus structure for resource sharing within the equipment, and provides facilities for various forms of input/output modules as well as for analog stimulus/response modules, programmable waveform generator modules, signature analysis and frequency measurement modules, real time emulation modules, etc., and for the connection of computer standard utilities such as keyboard, light-pen graphics, printer, etc.
    Type: Grant
    Filed: December 29, 1987
    Date of Patent: February 21, 1989
    Assignee: Mars Incorporated
    Inventors: John J. Comfort, Paul A. Hayter, Dinesh Kargathra, Brian R. Mason, Graham N. Turner, Ian R. Fisher, John W. Bailey
  • Patent number: 4714875
    Abstract: An in-circuit testing apparatus (manufacturing defects analyzer) for the determination of manufacturing defects in an electrical circuit board such as short circuits, tracking faults, mininserted omitted and out-of tolerance components etc., and not for effecting full functional testing of the circuit board, comprises an array of bidirectionally current conducting analog switching networks each of which defines a test point for connection to a node of a circuit board and connectable, under software control of the respective switchng network, either to a stimulus source or to a reference (e.g. ground) potential and simultaneously also to an input of a measurement facility. A resistor, capacitor, inductor or other circuit component can be connected between the test points defined by two of the switching networks and can thus be subjected to an appropriate stimulus and its response measured and analyzed for determining the viability of the respective component.
    Type: Grant
    Filed: April 12, 1985
    Date of Patent: December 22, 1987
    Assignee: Mars, Inc.
    Inventors: John W. Bailey, Paul A. Hayter, Brian R. Mason, Graham N. Turner