Abstract: The present invention encompasses techniques for reducing digital noise in integrated circuits and circuit assemblies, particularly dense mixed-signal integrated circuits, based upon shaping the noise from the digital circuit and concentrating it in a single, or a small number, of parts of the frequency spectrum. Generally, the presence of noise in the analog circuit is less important at certain frequencies, and therefore the spectral peak or peaks from the digital circuit can be carefully placed to result in little or no interference. As an example, a radio receiver might be designed such that the peaks of the digital noise lie between received channels, outside the band edges of each.

Abstract: A circuit and method for avoiding latch up in an integrated circuit in which the base-emitter junction of a parasitic bipolar transistor forming part of a parasitic SCR structure is monitored. If the forward bias of the monitored base-emitter junction approaches a predetermined value, the operation of the circuit is altered to prevent activation of the SCR.

Abstract: The duration of time during which an AC power voltage sinusoidal waveform remains between negative voltage threshold -V1 volts, nominally 5% of negative peak voltage -V2 volts, and positive voltage threshold +V1 volts, nominally 5% of peak positive voltage +V2 volts, is detected. By the change in voltage with time exhibited by a sinusoidal waveform in the region of zero voltage crossing, the expected time duration between voltage thresholds in approximately 5% of one-half period of such sinusoidal waveform. If the actual time between voltage thresholds exceeds (nominally) twice this value, or 10% of one-half period, then a power black-out condition is sensed, and a power fault signal is produced.

Abstract: Disclosed is an improved efficiency switching voltage converter system wherein the semiconductor switching device employed therein is provided with increased gate drive by selectively applying the most effective driving voltage available in the system.

Abstract: Disclosed is an improved efficiency switching voltage converter system wherein the semiconductor switching device employed therein is provided with increased gate drive by selectively applying the most effective driving voltage available in the system.