Abstract: A class of product demodulators operates by multiplying an input signal with a delayed version of itself. Bias distortion in such product demodulators arises when the signals to be multiplied together are not separated by the correct amount of delay. The amount of delay may be adjusted by additively combining a portion of the incoming signal with the delayed signal. In one embodiment an analog implementation is disclosed having a linear multiplier, adder, and delay line. In another embodiment a digital signal processor is utilized to perform product demodulation in accordance with the invention when periodic samples of the incoming waveform are the available signal.

Abstract: The phase of timing signals is compared with the phase of incoming digital signals to produce phase error signals and repeated phase corrections of the timing signals are made in accordance with the phase error signals. The phase corrections are initially delayed until phase error signals exceeding a predetermined magnitude persist for a predetermined interval of time. The corrections are removed without delay when the phase error signals are discontinued.