Patents by Inventor Grant Thomas Jennings

Grant Thomas Jennings has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210376833
    Abstract: An integrated circuit (“IC”) module includes a substrate, multiple field-programmable gate array (“FPGA”) dies, and pads capable of being selectively configured to perform one or more user defined logic functions. The substrate is configured to house multiple FPGA dies side-by-side in an array formation facilitating transmission of signals between the FPGA dies or chips. The FPGA dies are placed on the substrate functioning as a single FPGA device. The periphery dies of the FPGA dies are configured for external connectivity and the interior dies which are interconnected to perform user defined logic functions. The pads, in one aspect, coupling to the FPGA dies, are configured to provide connections between at least some of the FPGA dies.
    Type: Application
    Filed: May 31, 2021
    Publication date: December 2, 2021
    Inventors: Grant Thomas Jennings, Jinghui Zhu
  • Publication number: 20210081770
    Abstract: A system architecture based on SoC FPGA for edge artificial intelligence computing includes an MCU subsystem and an FPGA subsystem. The FPGA subsystem includes: an accelerator for accelerating artificial intelligence algorithm; and a shared memory used as an interface between the accelerator and the MCU subsystem. The shared memory is configured to upload the data to be calculated and to retrieve the operation result; the accelerator is configured to read the data from the shared memory independently and to write back the operation result. The system architecture has the advantages of small hardware area, low power consumption, high computing performance and easy use, and the design process is simple and flexible.
    Type: Application
    Filed: January 13, 2020
    Publication date: March 18, 2021
    Applicant: GOWN Semiconductor Corporation
    Inventors: Grant Thomas Jennings, Jianhua Liu
  • Patent number: 10833722
    Abstract: A semiconductor device contains an integrated circuit (“IC”) capable of being selectively programmed to perform one or more logic functions. The device, in one embodiment, includes multiple logic blocks (“LBs”), a routing fabric, and a configurable wireless communication block (“WCB”). The configurable LBs is able to be selectively programmed to perform one or more logic functions. The routing fabric is used to route information between the configurable LBs and input/output ports based on a routing configuration signals. The configurable WCB, having a control circuit and a built-in transceiver, is configured to facilitate transmitting information between the IC and an external system via a wireless communications network.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: November 10, 2020
    Assignee: GOWIN Semiconductor Corporation
    Inventors: Grant Thomas Jennings, Jinghui Zhu, Jianhua Liu