Patents by Inventor Grant Zhou

Grant Zhou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230315470
    Abstract: Techniques and mechanisms for configuring processor event-based sampling (PEBS) with a set of control registers. In an embodiment, a first control register of a processor is programmed to store a physical address of a location in a buffer which receives PEBS records. The first control register is further programmed or otherwise configured to store an indication of a size of the buffer. A second control register of the processor stores a physical address of a location in the buffer were a next PEBS record is to be stored. In another embodiment, the processor further comprises multiple control registers which variously configure PEBS generation on a per-counter basis.
    Type: Application
    Filed: March 30, 2022
    Publication date: October 5, 2023
    Applicant: Intel Corporation
    Inventors: Matthew Merten, Beeman Strong, Moshe Cohen, Ahmad Yasin, Andreas Kleen, Stanislav Bratanov, Karthik Gopalakrishnan, Angela Schmid, Grant Zhou
  • Patent number: 9575766
    Abstract: Some implementations provide techniques and arrangements for causing an interrupt in a processor in response to an occurrence of a number of events. A first event counter counts the occurrences of a type of event within the processor and outputs a signal to activate a second event counter in response to reaching a first predefined count. The second event counter counts the occurrences of the type of event within the processor and causes an interrupt of the processor in response to reaching a second predefined count.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: February 21, 2017
    Assignee: Intel Corporation
    Inventors: Ahmad Yasin, Peggy J. Irelan, Ofer Levy, Emile Ziedan, Grant Zhou
  • Publication number: 20140013091
    Abstract: Some implementations provide techniques and arrangements for causing an interrupt in a processor in response to an occurrence of a number of events. A first event counter counts the occurrences of a type of event within the processor and outputs a signal to activate a second event counter in response to reaching a first predefined count. The second event counter counts the occurrences of the type of event within the processor and causes an interrupt of the processor in response to reaching a second predefined count.
    Type: Application
    Filed: December 29, 2011
    Publication date: January 9, 2014
    Inventors: Ahmad Yasin, Peggy J. Irelan, Ofer Levy, Emile Ziedan, Grant Zhou