Patents by Inventor Greg Astfalk

Greg Astfalk has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10318767
    Abstract: A security framework for a multi-tenant, multi-tier computer system with embedded processing is described. A multi-tenant security framework is created for a combined processing and storage hierarchy of multiple tiers. The multi-tenant security framework is applied to multiple execution levels of the memory device. The multi-tenant security framework is applied to multiple layers of application server software of the memory device. The multi-tenant security framework is also applied to multiple layers of storage server software of the memory device.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: June 11, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Russ W. Herrell, Gregg B. Lesartre, Greg Astfalk, Douglas L. Voigt
  • Patent number: 10235078
    Abstract: Example implementations relate to a method of tracking data in a non-volatile memory device (NVM) device. A meta-data block from the NVM device is obtained, where the meta-data block includes meta-data. The meta-data block from the NVM device is used to track an associated data object, meta-data in the data block, a user data block, a meta-data block, or an additional data block. The meta-data block from the NVM device is used to point to the associated data object, the meta-data in the data block, the user data block, the meta-data block, or the additional data block. The meta-data block from the NVM device is further used to link the associated data object, the meta-data in the data block, the user data block, the meta-data block, or the additional data block.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: March 19, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Russ W. Herrell, Greg Astfalk, Gregg B. Lesartre, Andrew R. Wheeler
  • Patent number: 9921747
    Abstract: A unifying memory controller (UMC) to send and receive data to and from a local host. The UMC also may manage data placement and retrieval by using an address mapper. The UMC may also selectively provide power to a plurality of memory locations. The UMC may also manage data placement based on a policy that can make use of a property stored in the metadata storage location. The property may be a property describing the data that is being managed. The UMC also may use its own local cache that may store copies of data managed by the circuit.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: March 20, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Andrew R. Wheeler, Boris Zuckerman, Greg Astfalk, Russ W. Herrell
  • Publication number: 20170329998
    Abstract: A security framework for a multi-tenant, multi-tier computer system with embedded processing is described. A multi-tenant security framework is created for a combined processing and storage hierarchy of multiple tiers. The multi-tenant security framework is applied to multiple execution levels of the memory device. The multi-tenant security framework is applied to multiple layers of application server software of the memory device. The multi-tenant security framework is also applied to multiple layers of storage server software of the memory device.
    Type: Application
    Filed: December 10, 2014
    Publication date: November 16, 2017
    Inventors: Russ W. Herrell, Gregg B. Lesartre, Greg Astfalk, Douglas L. Voigt
  • Publication number: 20170315729
    Abstract: Example implementations relate to a method of tracking data in a non-volatile memory device (NVM) device. A meta-data block from the NVM device is obtained, where the meta-data block includes meta-data. The meta-data block from the NVM device is used to track an associated data object, meta-data in the data block, a user data block, a meta-data block, or an additional data block. The meta-data block from the NVM device is used to point to the associated data object, the meta-data in the data block, the user data block, the meta-data block, or the additional data block. The meta-data block from the NVM device is further used to link the associated data object, the meta-data in the data block, the user data block, the meta-data block, or the additional data block.
    Type: Application
    Filed: October 31, 2014
    Publication date: November 2, 2017
    Inventors: Russ W. Herrell, Greg Astfalk, Gregg B. Lesartre, Andrew R. Wheeler
  • Patent number: 9767901
    Abstract: An integrated circuit is provided. In an example, the integrated circuit includes a first address line, a selector device electrically coupled to the first address lines, and a memory device electrically coupled between the selector device and a second address line. The selector device has a first I-V response in a first current direction and a second I-V response in a second current direction that is different from the first I-V response.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: September 19, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Amit S. Sharma, Gary Gibson, Naveen Muralimanohar, Martin Foltin, Greg Astfalk
  • Publication number: 20160342333
    Abstract: A unifying memory controller (UMC) to send and receive data to and from a local host. The UMC also may manage data placement and retrieval by using an address mapper. The UMC may also selectively provide power to a plurality of memory locations. The UMC may also manage data placement based on a policy that can make use of a property stored in the metadata storage location. The property may be a property describing the data that is being managed. The UMC also may use its own local cache that may store copies of data managed by the circuit.
    Type: Application
    Filed: January 31, 2014
    Publication date: November 24, 2016
    Inventors: Andrew R Wheeler, Boris ZUCKERMAN, Greg ASTFALK, Russ W. HERRELL
  • Patent number: 9425902
    Abstract: A system including a driver circuit. The driver circuit is configured to provide first output signals in a first mode for electrical signaling and second output signals in a second mode for optical signaling. The driver circuit is configured to provide the first output signals in the first mode with at least one of a lower frequency and higher power and the second output signals in the second mode with at least one of a higher frequency and lower power.
    Type: Grant
    Filed: January 11, 2010
    Date of Patent: August 23, 2016
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Kirk M. Bresniker, Greg Astfalk
  • Patent number: 8929694
    Abstract: In one example, a composite processor includes a circuit board, a first processor element package, and a second processor element package. The circuit board has an optical link and an electrical link. The first processor element package includes a substrate with an integrated circuit, a sub-wavelength grating optical coupler, and an electrical coupler coupled to the electrical link of the circuit board. The second processor element package includes a substrate with an integrated circuit, a sub-wavelength grating optical coupler, and an electrical coupler coupled to the electrical link of the circuit board. The sub-wavelength grating optical coupler of the first processor element package, the optical link of the circuit board, and the sub-wavelength grating optical coupler of the second processor element package collectively define an optical communications path between the substrate of the first processor element package and the substrate of the second processor element package.
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: January 6, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Raymond G Beausoleil, Marco Fiorentino, Moray McLaren, Greg Astfalk, Nathan Lorenzo Binkert, David A. Fattal
  • Publication number: 20130318325
    Abstract: In one example, a composite processor (100) includes a circuit board (1200), a first processor element package (1230), and a second processor element package (1240). The circuit board has an optical link (1211) and an electrical link (1221). The first processor element package (1230) includes a substrate (1231) with an integrated circuit (240), a sub-wavelength grating optical coupler (1232), and an electrical coupler (1233) coupled to the electrical link (1221) of the circuit board (1200). The second processor element package (1240) includes a substrate (1241) with an integrated circuit (240), a sub-wavelength grating optical coupler (1242), and an electrical coupler (1243) coupled to the electrical link (1221) of the circuit board (1220).
    Type: Application
    Filed: January 20, 2011
    Publication date: November 28, 2013
    Inventors: Raymond G. Beausoleil, Marco Fiorentino, Moray McLaren, Greg Astfalk, Nathan Lorenzo Binkert, David A. Fattal
  • Publication number: 20120119795
    Abstract: A system including a driver circuit. The driver circuit is configured to provide first output signals in a first mode for electrical signaling and second output signals in a second mode for optical signaling. The driver circuit is configured to provide the first output signals in the first mode with at least one of a lower frequency and higher power and the second output signals in the second mode with at least one of a higher frequency and lower power.
    Type: Application
    Filed: January 11, 2010
    Publication date: May 17, 2012
    Inventors: Kirk M Bresniker, Greg Astfalk
  • Patent number: 4512944
    Abstract: Extruder tooling for directing plastic materials to enclose a conductor (26) being advanced along a path of travel through a core tube (97) and aligned dies includes disc-like flow passages (107, 129) which are disposed concentrically about and perpendicularly to the conductor. This arrangement minimizes conductor tension in a pressure extrusion arrangement by significantly reducing the length of the plastic-to-conductor contact within the extruder. The length and width of each flow passage normal to and along a path of travel are sufficient to provide a uniform distribution of plastic material circumferentially about the conductor and to dissipate stresses which have been induced in the plastic materials. In a tubing arrangement, the length of a cantilevered portion of the core tube is reduced significantly which results in improved concentricity of the plastic material about the conductor.
    Type: Grant
    Filed: June 23, 1983
    Date of Patent: April 23, 1985
    Assignee: AT&T Technologies, Inc.
    Inventors: Greg Astfalk, Timothy S. Dougherty, Montri Viriyayuthakorn