Patents by Inventor Greg Mewhinney

Greg Mewhinney has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100275206
    Abstract: Standalone software performance optimizer systems for hybrid systems include a hybrid system having a plurality of processors, memory operably connected to the processors, an operating system including a dispatcher loaded into the memory, a multithreaded application read into the memory, and a static performance analysis program loaded into the memory; wherein the static performance analysis program instructs at least one processor to perform static performance analysis on each of the threads, the static performance analysis program instructs at least one processor to assign each thread to a CPU class based on the static performance analysis, and the static performance analysis program instructs at least one processor to store each thread's CPU class.
    Type: Application
    Filed: April 22, 2009
    Publication date: October 28, 2010
    Applicant: International Business Machines Corporation
    Inventors: Greg Mewhinney, Diane Flemming, David Whitworth, William Maron, Mysore Srinivas
  • Publication number: 20070101333
    Abstract: A first collection of threads which represent a collection of tasks to be executed by at least one of a collection of processing units is monitored. In response to detecting a request by a thread among the first collection of threads to access a shared resource locked by a second thread among the collection of threads, the first thread attempts to access a list associated with the shared resource. The list orders at least one thread among the collection of threads by priority of access to the shared resource. In response to determining the list is locked by a third thread among the collection of threads, the first thread is placed into a sleep state to be reawakened in a fixed period of time. In response to determining that at least one of the collection of processing units has entered into an idle state, the first thread is awakened from the sleep state before the fixed period of time has expired.
    Type: Application
    Filed: October 27, 2005
    Publication date: May 3, 2007
    Inventors: Greg Mewhinney, Mysore Srinivas
  • Publication number: 20070061810
    Abstract: A method and system for providing access to a shared resource utilizing selective locking are disclosed. According to one embodiment, a method is provided comprising receiving a request to perform a resource access operation on a shared resource, invoking a first routine to perform the resource access operation, detecting a data processing system exception generated in response to invoking the first routine, and invoking a second routine to perform the resource access operation in response to such detecting. In the described embodiment, the first routine comprises a dereference instruction to dereference a pointer to memory associated with the shared resource, the second routine comprises a lock acquisition instruction to acquire a global lock associated with the shared resource prior to a performance of the resource access operation and a lock release instruction to release the global lock once resource access operation has been performed.
    Type: Application
    Filed: September 15, 2005
    Publication date: March 15, 2007
    Inventors: David Mehaffy, Greg Mewhinney, Mysore Srinivas
  • Publication number: 20070038809
    Abstract: A computer implemented method, apparatus, and computer usable code for managing cache data. A partition identifier is associated with a cache entry in a cache, wherein the partition identifier identifies a last partition accessing the cache entry. The partition identifier associated with the cache entry is compared with a previous partition identifier located in a processor register in response to the cache entry being moved into a lower level cache relative to the cache. The cache entry is marked if the partition identifier associated with the cache entry matches the previous partition identifier located in the processor register to form a marked cache entry, wherein the marked cache entry is aged at a slower rate relative to an unmarked cache entry.
    Type: Application
    Filed: August 11, 2005
    Publication date: February 15, 2007
    Inventors: Jos Accapadi, Andrew Dunshea, Greg Mewhinney, Mysore Srinivas
  • Publication number: 20070033371
    Abstract: A computer implemented method, apparatus, and computer usable code for managing cache information in a logical partitioned data processing system. A determination is made as to whether a unique identifier in a tag associated with a cache entry in a cache matches a previous unique identifier for a currently executing partition in the logical partitioned data processing system when the cache entry is selected for removal from the cache, and saves the tag in a storage device if the partition identifier in the tag matches the previous unique identifier.
    Type: Application
    Filed: August 4, 2005
    Publication date: February 8, 2007
    Inventors: Andrew Dunshea, Greg Mewhinney, Mysore Srinivas
  • Publication number: 20060047911
    Abstract: A method, apparatus, and computer instructions for accessing data. In response to identifying a transaction requiring data, address information is obtained for the data. The address information includes an indication of whether the data is unlikely to be located on remote caches for local nodes. The remote caches for local nodes are searched if the indication is present in the address information. The data is requested from main memory if the indication is absent.
    Type: Application
    Filed: September 2, 2004
    Publication date: March 2, 2006
    Applicant: International Business Machines Corporation
    Inventors: Greg Mewhinney, Mysore Srinivas
  • Publication number: 20050283573
    Abstract: A method, computer program product, and a data processing system for maintaining objects in a lookup cache is provided. A primary list is populated with a first plurality of objects. The primary list is an unordered list of the first plurality of objects. A secondary list is populated with a second plurality of objects. The secondary list is an ordered list of the second plurality of objects. Periodically, at least one object of the first plurality of objects is demoted to the secondary list, and at least one object of the second plurality of objects is promoted to the primary list.
    Type: Application
    Filed: June 17, 2004
    Publication date: December 22, 2005
    Applicant: International Business Machines Corporation
    Inventors: Greg Mewhinney, Mysore Srinivas