Patents by Inventor Greg R. Mewhinney
Greg R. Mewhinney has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9021206Abstract: A method, system and program are provided for controlling access to a specified cache level in a cache hierarchy in a multiprocessor system by evaluating cache statistics for a specified application at the specified cache level against predefined criteria to prevent the specified application from accessing the specified cache level if the specified application does not meeting the predefined criteria.Type: GrantFiled: August 25, 2011Date of Patent: April 28, 2015Assignee: International Business Machines CorporationInventors: Diane G. Flemming, Brian C. Twichell, Greg R. Mewhinney, David B. Whitworth
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Patent number: 8996477Abstract: A method utilizes cluster-awareness to effectively support a live partition mobility (LPM) event and provide recovery from node failure within a Virtual Input/Output (I/O) Server (VIOS) cluster. An LPM utility creates a monitoring thread on a first VIOS on initiation of a corresponding LPM event. The monitoring thread tracks a status of an LPM and records status information in the mobility table of a database. The LPM utility creates other monitoring threads on other VIOSes running on the (same) source server. If the first VIOS VIOS sustains one of multiple failures, the LPM utility provides notification to other functioning nodes/VIOSes. The LPM utility enables a functioning monitoring thread to update the LPM status. In particular, a last monitoring thread may perform cleanup/update operations within the database based on an indication that there are nodes on the first server that are in failed state.Type: GrantFiled: September 15, 2012Date of Patent: March 31, 2015Assignee: International Business Machines CorporationInventors: Greg R. Mewhinney, David Nevarez, James A. Pafumi, Jacob J. Rosales
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Patent number: 8874805Abstract: A mechanism is provided for offloading an input/output (I/O) completion operation. Responsive to a second processor identifying that a flag has been set by a first processor requesting assistance in completing an I/O operation, the second processor copies an I/O response from a first I/O response data structure associated with the first processor to a second I/O response data structure associated with the second processor. The second processor deletes the I/O response from the first I/O response data structure, clears the flag, and processes the I/O operation by addressing the I/O response in the second I/O response data structure. Responsive to completing the I/O operation, the second processor deletes the I/O response from the second I/O response data structure.Type: GrantFiled: November 19, 2012Date of Patent: October 28, 2014Assignee: International Business Machines CorporationInventors: Bruce G. Mealey, Greg R. Mewhinney, Mysore S. Srinivas, Suresh E. Warrier
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Patent number: 8843673Abstract: A mechanism is provided for offloading an input/output (I/O) completion operation. Responsive to a second processor identifying that a flag has been set by a first processor requesting assistance in completing an I/O operation, the second processor copies an I/O response from a first I/O response data structure associated with the first processor to a second I/O response data structure associated with the second processor. The second processor deletes the I/O response from the first I/O response data structure, clears the flag, and processes the I/O operation by addressing the I/O response in the second I/O response data structure. Responsive to completing the I/O operation, the second processor deletes the I/O response from the second I/O response data structure.Type: GrantFiled: February 20, 2013Date of Patent: September 23, 2014Assignee: International Business Machines CorporationInventors: Bruce G. Mealey, Greg R. Mewhinney, Mysore S. Srinivas, Suresh E. Warrier
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Patent number: 8745622Abstract: Standalone software performance optimizer systems for hybrid systems include a hybrid system having a plurality of processors, memory operably connected to the processors, an operating system including a dispatcher loaded into the memory, a multithreaded application read into the memory, and a static performance analysis program loaded into the memory; wherein the static performance analysis program instructs at least one processor to perform static performance analysis on each of the threads, the static performance analysis program instructs at least one processor to assign each thread to a CPU class based on the static performance analysis, and the static performance analysis program instructs at least one processor to store each thread's CPU class.Type: GrantFiled: April 22, 2009Date of Patent: June 3, 2014Assignee: International Business Machines CorporationInventors: Greg R. Mewhinney, Diane Garza Flemming, David B. Whitworth, William A. Maron, Mysore Sathyanarayana Srinivas
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Publication number: 20140143465Abstract: A mechanism is provided for offloading an input/output (I/O) completion operation. Responsive to a second processor identifying that a flag has been set by a first processor requesting assistance in completing an I/O operation, the second processor copies an I/O response from a first I/O response data structure associated with the first processor to a second I/O response data structure associated with the second processor. The second processor deletes the I/O response from the first I/O response data structure, clears the flag, and processes the I/O operation by addressing the I/O response in the second I/O response data structure. Responsive to completing the I/O operation, the second processor deletes the I/O response from the second I/O response data structure.Type: ApplicationFiled: February 20, 2013Publication date: May 22, 2014Applicant: International Business Machines CorporationInventors: Bruce G. Mealey, Greg R. Mewhinney, Mysore S. Srinivas, Suresh E. Warrier
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Publication number: 20140143458Abstract: A mechanism is provided for offloading an input/output (I/O) completion operation. Responsive to a second processor identifying that a flag has been set by a first processor requesting assistance in completing an I/O operation, the second processor copies an I/O response from a first I/O response data structure associated with the first processor to a second I/O response data structure associated with the second processor. The second processor deletes the I/O response from the first I/O response data structure, clears the flag, and processes the I/O operation by addressing the I/O response in the second I/O response data structure. Responsive to completing the I/O operation, the second processor deletes the I/O response from the second I/O response data structure.Type: ApplicationFiled: November 19, 2012Publication date: May 22, 2014Applicant: International Business Machines CorporationInventors: Bruce G. Mealey, Greg R. Mewhinney, Mysore S. Srinivas, Suresh E. Warrier
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Patent number: 8578388Abstract: A hybrid CPU system wherein the plurality of processors forming the hybrid system are initially undifferentiated by type or class. Responsive to the sampling of the threads of a received and loaded computer application to be executed, the function of at least one of the processors is changed so that the threads of the sampled application may be most effectively processed/run on the hybrid system.Type: GrantFiled: October 25, 2010Date of Patent: November 5, 2013Assignee: International Business Machines CorporationInventors: Diane Flemming, Greg R. Mewhinney, David B. Whitworth, Randal C. Swanberg, Eric P. Fried
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Patent number: 8566827Abstract: A first collection of threads which represent a collection of tasks to be executed by at least one of a collection of processing units is monitored. In response to detecting a request by a thread among the first collection of threads to access a shared resource locked by a second thread among the collection of threads, the first thread attempts to access a list associated with the shared resource. The list orders at least one thread among the collection of threads by priority of access to the shared resource. In response to determining the list is locked by a third thread among the collection of threads, the first thread is placed into a sleep state to be reawakened in a fixed period of time. In response to determining that at least one of the collection of processing units has entered into an idle state, the first thread is awakened from the sleep state before the fixed period of time has expired.Type: GrantFiled: October 27, 2005Date of Patent: October 22, 2013Assignee: International Business Machines CorporationInventors: Greg R. Mewhinney, Mysore S. Srinivas
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Patent number: 8539453Abstract: In an embodiment, a kernel performs autonomic input/output tracing and performance tuning. A first table is provided in a device driver framework and a second table in a kernel of a computer. An input/output device monitoring tool is provided in the device driver framework. A plurality of instructions in the kernel compares each value in the first table with each value in the second table. Responsive to a match of a value in the first table and a value in the second table, the kernel automatically runs a command line to perform a system trace, a component trace, or a tuning task. The first table is populated with a plurality of values calculated from a plurality of data in a plurality of device memories and in the controller memory and the second table is populated in accordance with a second plurality of inputs to the command line interface.Type: GrantFiled: June 30, 2010Date of Patent: September 17, 2013Assignee: International Business Machines CorporationInventors: Diane G. Flemming, Greg R. Mewhinney, Brian C. Twichell, David B. Whitworth
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Patent number: 8521703Abstract: A system and computer program product utilizes cluster-awareness to effectively support a live partition mobility (LPM) event and provide recovery from node failure within a Virtual Input/Output (I/O) Server (VIOS) cluster. An LPM utility creates a monitoring thread on a first VIOS on initiation of a corresponding LPM event. The monitoring thread tracks a status of an LPM and records status information in the mobility table of a database. The LPM utility creates other monitoring threads on other VIOSes running on the (same) source server. If the first VIOS sustains one of multiple failures, the LPM utility provides notification to other functioning nodes/VIOSes. The LPM utility enables a functioning monitoring thread to update the LPM status. In particular, a last monitoring thread may perform cleanup/update operations within the database based on an indication that there are nodes on the first server that are in failed state.Type: GrantFiled: November 5, 2010Date of Patent: August 27, 2013Assignee: International Business Machines CorporationInventors: Greg R. Mewhinney, David Nevarez, James A. Pafumi, Jacob Jason Rosales
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Patent number: 8453122Abstract: A symmetric multi-processor SMP system includes an SMP processor and operating system OS software that performs automatic SMP lock tracing analysis on an executing application program. System administrators, users or other entities initiate an automatic SMP lock tracing analysis. A particular thread of the executing application program requests and obtains a lock for a memory address pointer. A subsequent thread requests the same memory address pointer lock prior to the particular thread release of that lock. The subsequent thread begins to spin waiting for the release of that address pointer lock. When the subsequent thread reaches a predetermined maximum amount of wait time, MAXSPIN, a lock testing tool in the kernel of the OS detects the MAXSPIN condition. The OS performs a test to determine if the subsequent thread and address pointer lock meet the list of criteria set during initiation of the automatic lock trace method.Type: GrantFiled: November 10, 2009Date of Patent: May 28, 2013Assignee: International Business Machines CorporationInventors: Diane Garza Flemming, Eric Philip Fried, Greg R. Mewhinney, David Blair Whitworth
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Publication number: 20130097295Abstract: Provided are techniques for providing a user interface on a storage virtualizer, the user interface configured to enable a worldwide unique identifier (WWPN) to be selectively activated on a storage area network (SAN), and setting up a zoning for the WWPN on the SAN prior to installation of a virtual I/O client and without a requirement that the user manually enter the WWPN.Type: ApplicationFiled: October 18, 2011Publication date: April 18, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Maria deLourdes Garza, Krishnakumar Jinka, Greg R. Mewhinney, James A. Pafumi
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Publication number: 20130054897Abstract: A method, system and program are provided for controlling access to a specified cache level in a cache hierarchy in a multiprocessor system by evaluating cache statistics for a specified application at the specified cache level against predefined criteria to prevent the specified application from accessing the specified cache level if the specified application does not meeting the predefined criteria.Type: ApplicationFiled: August 25, 2011Publication date: February 28, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Diane G. Flemming, Brian C. Twichell, Greg R. Mewhinney, David B. Whitworth
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Publication number: 20130024718Abstract: A method utilizes cluster-awareness to effectively support a live partition mobility (LPM) event and provide recovery from node failure within a Virtual Input/Output (I/O) Server (VIOS) cluster. An LPM utility creates a monitoring thread on a first VIOS on initiation of a corresponding LPM event. The monitoring thread tracks a status of an LPM and records status information in the mobility table of a database. The LPM utility creates other monitoring threads on other VIOSes running on the (same) source server. If the first VIOS VIOS sustains one of multiple failures, the LPM utility provides notification to other functioning nodes/VIOSes. The LPM utility enables a functioning monitoring thread to update the LPM status. In particular, a last monitoring thread may perform cleanup/update operations within the database based on an indication that there are nodes on the first server that are in failed state.Type: ApplicationFiled: September 15, 2012Publication date: January 24, 2013Applicant: IBM CorporationInventors: Greg R. Mewhinney, David Nevarez, James A. Pafumi, Jacob J. Rosales
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Publication number: 20120303594Abstract: A method, system, and computer program product utilizes cluster-awareness to effectively support a live partition mobility (LPM) event and provide recovery from node failure within a Virtual Input/Output (I/O) Server (VIOS) cluster. An LPM utility creates a monitoring thread on a first VIOS on initiation of a corresponding LPM event. The monitoring thread tracks a status of an LPM and records status information in the mobility table of a database. The LPM utility creates other monitoring threads on other VIOSes running on the (same) source server. If the first VIOS VIOS sustains one of multiple failures, the LPM utility provides notification to other functioning nodes/VIOSes. The LPM utility enables a functioning monitoring thread to update the LPM status. In particular, a last monitoring thread may perform cleanup/update operations within the database based on an indication that there are nodes on the first server that are in failed state.Type: ApplicationFiled: November 5, 2010Publication date: November 29, 2012Applicant: IBM CORPORATIONInventors: Greg R. Mewhinney, David Nevarez, James A. Pafumi, Jacob J. Rosales
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Patent number: 8275802Abstract: A method, computer program product, and a data processing system for maintaining objects in a lookup cache is provided. A primary list is populated with a first plurality of objects. The primary list is an unordered list of the first plurality of objects. A secondary list is populated with a second plurality of objects. The secondary list is an ordered list of the second plurality of objects. Periodically, at least one object of the first plurality of objects is demoted to the secondary list, and at least one object of the second plurality of objects is promoted to the primary list.Type: GrantFiled: June 17, 2004Date of Patent: September 25, 2012Assignee: International Business Machines CorporationInventors: Greg R. Mewhinney, Mysore Sathyanarayana Srinivas
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Patent number: 8225327Abstract: A method and system for providing access to a shared resource utilizing selective locking are disclosed. According to one embodiment, a method is provided comprising receiving a request to perform a resource access operation on a shared resource, invoking a first routine to perform the resource access operation, detecting a data processing system exception generated in response to invoking the first routine, and invoking a second routine to perform the resource access operation in response to such detecting. In the described embodiment, the first routine comprises a dereference instruction to dereference a pointer to memory associated with the shared resource, the second routine comprises a lock acquisition instruction to acquire a global lock associated with the shared resource prior to a performance of the resource access operation and a lock release instruction to release the global lock once resource access operation has been performed.Type: GrantFiled: September 15, 2005Date of Patent: July 17, 2012Assignee: International Business Machines CorporationInventors: David W. Mehaffy, Greg R. Mewhinney, Mysore S. Srinivas
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Publication number: 20120102499Abstract: A hybrid CPU system wherein the plurality of processors forming the hybrid system are initially undifferentiated by type or class. Responsive to the sampling of the threads of a received and loaded computer application to be executed, the function of at least one of the processors is changed so that the threads of the sampled application may be most effectively processed/run on the hybrid system.Type: ApplicationFiled: October 25, 2010Publication date: April 26, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Diane Flemming, William A. Maron, Greg R. Mewhinney, Mysore S. Srinivas, David B. Whitworth
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Publication number: 20120005580Abstract: In an embodiment, a kernel performs autonomic input/output tracing and performance tuning. A first table is provided in a device driver framework and a second table in a kernel of a computer. An input/output device monitoring tool is provided in the device driver framework. A plurality of instructions in the kernel compares each value in the first table with each value in the second table. Responsive to a match of a value in the first table and a value in the second table, the kernel automatically runs a command line to perform a system trace, a component trace, or a tuning task. The first table is populated with a plurality of values calculated from a plurality of data in a plurality of device memories and in the controller memory and the second table is populated in accordance with a second plurality of inputs to the command line interface.Type: ApplicationFiled: June 30, 2010Publication date: January 5, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Diane G. Flemming, Greg R. Mewhinney, Brian C. Twichell, David B. Whitworth