Patents by Inventor Gregg J. Armezzani

Gregg J. Armezzani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6653575
    Abstract: An electronic package which includes first and second circuitized substrates secured together by a solder member which includes a first contact portion for attachment to a printed circuit board and a second contact portion used to bond the two substrates together (e.g., to form a multi-chip module). Semiconductor chips can be positioned on and electrically coupled to the formed solder members.
    Type: Grant
    Filed: January 17, 2001
    Date of Patent: November 25, 2003
    Assignee: International Business Machines Corporation
    Inventors: Gregg J. Armezzani, Matthew A. Heller
  • Patent number: 6617528
    Abstract: An electronic package which includes first and second circuitized substrates secured together by a solder member which includes a first contact portion for attachment to a printed circuit board and a second contact portion used to bond the two substrates together (e.g., to form a multi-chip module). Semiconductor chips can be positioned on and electrically coupled to the formed solder members.
    Type: Grant
    Filed: January 17, 2001
    Date of Patent: September 9, 2003
    Assignee: International Business Machines Corporation
    Inventors: Gregg J. Armezzani, Matthew A. Heller
  • Patent number: 6574113
    Abstract: An electronic package which includes first and second circuitized substrates secured together by a solder member which includes a first contact portion for attachment to a printed circuit board and a second contact portion used to bond the two substrates together (e.g., to form a multi-chip module). Semiconductor chips can be positioned on and electrically coupled to the formed solder members.
    Type: Grant
    Filed: January 17, 2001
    Date of Patent: June 3, 2003
    Assignee: International Business Machines Corporation
    Inventors: Gregg J. Armezzani, Matthew A. Heller
  • Patent number: 6452116
    Abstract: A method is provided for connecting two conductive layers in an electronic circuit package comprising the steps of placing one or more blind vias in a first substrate positioned on top of a first conductor; placing one or more blind vias in a second substrate positioned under a second conductor; attaching one or more signal lines to one or more of the one or more blind vias; and assembling ball grid array components such that the first conductor is electrically connected to the second conductor. Also claimed is an electronic circuit package incorporating the blind vias for electrical connection between layers in accordance with the present invention.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: September 17, 2002
    Assignee: International Business Machines Corporation
    Inventors: Gregg J. Armezzani, Kishor V. Desai, Jeffrey S. Perkins, John J. Pessarchick
  • Patent number: 6281437
    Abstract: An electrical connection between a flexible circuitized substrate and a separator conductor is formed wherein the substrate's dielectric member has a region of reduced thickness immediately adjacent the portion of the substrate's conductor that is being connected (e.g., using thermocompression bonding) to the separate conductor (e.g., a chip's contact site or a solder ball thereon). Heat and pressure is applied to form the bond between both conductors, this heat passing through the reduced thickness dielectric while appropriate pressure is applied. The reduced thickness assures heat flow (and possibly displacement of the dielectric in this region, e.g., it “melts back”) to thus facilitate bond formation, but also is able to positively retain several conductors of the substrate in spaced alignment during the bonding to respective solder balls or chip contact sites.
    Type: Grant
    Filed: November 10, 1999
    Date of Patent: August 28, 2001
    Assignee: International Business Machines Corporation
    Inventors: Steven W. Anderson, Gregg J. Armezzani, Daniel P. Labzentis
  • Publication number: 20010014015
    Abstract: An electronic package which includes first and second circuitized substrates secured together by a solder member which includes a first contact portion for attachment to a printed circuit board and a second contact portion used to bond the two substrates together (e.g., to form a multi-chip module). Semiconductor chips can be positioned on and electrically coupled to the formed solder members.
    Type: Application
    Filed: January 17, 2001
    Publication date: August 16, 2001
    Inventors: Gregg J. Armezzani, Matthew A. Heller
  • Patent number: 6272742
    Abstract: A method is provided for connecting two conductive layers in an electronic circuit package comprising the steps of placing one or more blind vias in a first substrate positioned on top of a first conductor; placing one or more blind vias in a second substrate positioned under a second conductor; attaching one or more signal lines to one or more of the one or more blind vias; and assembling ball grid array components such that the first conductor is electrically connected to the second conductor. Also claimed is an electronic circuit package incorporating the blind vias for electrical connection between layers in accordance with the present invention.
    Type: Grant
    Filed: October 8, 1999
    Date of Patent: August 14, 2001
    Assignee: International Business Machines Corporation
    Inventors: Gregg J. Armezzani, Kishor V. Desai, Jeffery S. Perkins, John J. Pessarchick
  • Publication number: 20010010628
    Abstract: A method is provided for connecting two conductive layers in an electronic circuit package comprising the steps of placing one or more blind vias in a first substrate positioned on top of a first conductor; placing one or more blind vias in a second substrate positioned under a second conductor; attaching one or more signal lines to one or more of the one or more blind vias; and assembling ball grid array components such that the first conductor is electrically connected to the second conductor. Also claimed is an electronic circuit package incorporating the blind vias for electrical connection between layers in accordance with the present invention.
    Type: Application
    Filed: February 28, 2001
    Publication date: August 2, 2001
    Applicant: International Business Machines Corporation
    Inventors: Gregg J. Armezzani, Kishor V. Desai, Jeffery S. Perkins, John J. Pessarchick
  • Publication number: 20010001593
    Abstract: An electronic package which includes first and second circuitized substrates secured together by a solder member which includes a first contact portion for attachment to a printed circuit board and a second contact portion used to bond the two substrates together (e.g., to form a multi-chip module). Semiconductor chips can be positioned on and electrically coupled to the formed solder members.
    Type: Application
    Filed: January 17, 2001
    Publication date: May 24, 2001
    Inventors: Gregg J. Armezzani, Matthew A. Heller
  • Publication number: 20010001594
    Abstract: An electronic package which includes first and second circuitized substrates secured together by a solder member which includes a first contact portion for attachment to a printed circuit board and a second contact portion used to bond the two substrates together (e.g., to form a multi-chip module). Semiconductor chips can be positioned on and electrically coupled to the formed solder members.
    Type: Application
    Filed: January 17, 2001
    Publication date: May 24, 2001
    Inventors: Gregg J. Armezzani, Matthew A. Heller
  • Patent number: 6198634
    Abstract: An electronic package which includes first and second circuitized substrates secured together by a solder member which includes a first contact portion for attachment to a printed circuit board and a second contact portion used to bond the two substrates together (e.g., to form a multi-chip module). Semiconductor chips can be positioned on and electrically coupled to the formed solder members.
    Type: Grant
    Filed: March 31, 1999
    Date of Patent: March 6, 2001
    Assignee: International Business Machines Corporation
    Inventors: Gregg J. Armezzani, Matthew A. Heller
  • Patent number: 6023029
    Abstract: A method is provided for connecting two conductive layers in an electronic circuit package including the steps of placing one or more blind vias in a first substrate positioned on top of a first conductor; placing one or more blind vias in a second substrate positioned under a second conductor; attaching one or more signal lines to one or more of the one or more blind vias; and assembling ball grid array components such that the first conductor is electrically connected to the second conductor. Also claimed is an electronic circuit package incorporating the blind vias for electrical connection between layers in accordance with the present invention.
    Type: Grant
    Filed: March 19, 1998
    Date of Patent: February 8, 2000
    Assignee: International Business Machines Corporation
    Inventors: Gregg J. Armezzani, Kishor V. Desai, Jeffery S. Perkins, John J. Pessarchick