Abstract: A client device presents a user interface including a macro entry field for defining a macro indicator from a plurality of macro indicators and transmits the macro indicator. A server stores a database of macro-based diagnoses, each macro-based diagnosis associated with one or more elements of an accession, and one or more specimens associated with the accession. The server also receives the macro indicator from the client device, retrieves an initial diagnosis from the database of macro-based diagnoses responsive to the macro indicator, and transmits the initial diagnosis. The client device, receives the initial diagnosis, pre-populates one or more text boxes on the user interface with information from the initial diagnosis, and enables the user to edit the pre-populated one or more text boxes.

Abstract: A client device presents a user interface including a macro entry field for defining a macro indicator from a plurality of macro indicators and transmits the macro indicator. A server stores a database of macro-based diagnoses, each macro-based diagnosis associated with one or more elements of an accession, and one or more specimens associated with the accession. The server also receives the macro indicator from the client device, retrieves an initial diagnosis from the database of macro-based diagnoses responsive to the macro indicator, and transmits the initial diagnosis. The client device, receives the initial diagnosis, pre-populates one or more text boxes on the user interface with information from the initial diagnosis, and enables the user to edit the pre-populated one or more text boxes.

Abstract: A client device presents a user interface including a macro entry field for defining a macro indicator from a plurality of macro indicators and transmits the macro indicator. A server stores a database of macro-based diagnoses, each macro-based diagnosis associated with one or more elements of an accession, and one or more specimens associated with the accession. The server also receives the macro indicator from the client device, retrieves an initial diagnosis from the database of macro-based diagnoses responsive to the macro indicator, and transmits the initial diagnosis. The client device, receives the initial diagnosis, pre-populates one or more text boxes on the user interface with information from the initial diagnosis, and enables the user to edit the pre-populated one or more text boxes.

Abstract: Techniques are described for providing consistent memory operations and security across electronic circuitry components having disparate memory and/or security architectures when integrating such disparately architected components within a single system, such as a system on chip. A programmable logical hierarchy of isolated memory region (IMR) enforcement circuits is provided to protect such IMRs, allowing or preventing memory access requests from one of multiple distinct circuitry components based on configuration registers for the IMR enforcement circuits. Integration of multiple trust domain architectures associated with the multiple distinct circuitry components is facilitated via trust domain conversion bridge circuitry that includes translation logic for generating information in accordance with a first trust domain architecture based on information provided in accordance with a distinct second trust domain architecture.

Abstract: Techniques are described for providing consistent memory operations and security across electronic circuitry components having disparate memory and/or security architectures when integrating such disparately architected components within a single system, such as a system on chip. A programmable logical hierarchy of isolated memory region (IMR) enforcement circuits is provided to protect such IMRs, allowing or preventing memory access requests from one of multiple distinct circuitry components based on configuration registers for the IMR enforcement circuits. Integration of multiple trust domain architectures associated with the multiple distinct circuitry components is facilitated via trust domain conversion bridge circuitry that includes translation logic for generating information in accordance with a first trust domain architecture based on information provided in accordance with a distinct second trust domain architecture.

Abstract: A client device presents a user interface including a macro entry field for defining a macro indicator from a plurality of macro indicators and transmits the macro indicator. A server stores a database of macro-based diagnoses, each macro-based diagnosis associated with one or more elements of an accession, and one or more specimens associated with the accession. The server also receives the macro indicator from the client device, retrieves an initial diagnosis from the database of macro-based diagnoses responsive to the macro indicator, and transmits the initial diagnosis. The client device, receives the initial diagnosis, pre-populates one or more text boxes on the user interface with information from the initial diagnosis, and enables the user to edit the pre-populated one or more text boxes.

Abstract: Computing systems and computer-implemented methods for managing pathology lab workflow include storing a plurality of system objects, each system object representing an item to be tracked in the pathology lab workflow, the plurality of system objects including objects selected from the group consisting of accession, patient, and tissue samples. A plurality of system object maps are also stored, each system object map designating transitions between operations being tracked within the pathology lab workflow. The method also includes performing a multi-relational analysis of two or more system objects applied to one or more system object maps to identify a next state in the pathology lab for an item being tracked and outputting to a user the next state in the pathology lab for the item being tracked.

Abstract: Techniques are described for providing consistent memory operations and security across electronic circuitry components having disparate memory and/or security architectures when integrating such disparately architected components within a single system, such as a system on chip. A programmable logical hierarchy of isolated memory region (IMR) enforcement circuits is provided to protect such IMRs, allowing or preventing memory access requests from one of multiple distinct circuitry components based on configuration registers for the IMR enforcement circuits. Integration of multiple trust domain architectures associated with the multiple distinct circuitry components is facilitated via trust domain conversion bridge circuitry that includes translation logic for generating information in accordance with a first trust domain architecture based on information provided in accordance with a distinct second trust domain architecture.

Abstract: In one example, a system for managing access to hardware components includes a processor to manage a transition of a component from a known trusted first state and a context of a first application to a known trusted second state and a context of a second application based on trusted meta-data. The processor can also prevent contamination across the known trusted state of each application based on the trusted meta-data associated with each application. Additionally, the processor can detect a change of a trust boundary from the first application to the second application, save the first state of the first application accessing the component, remove said first state from the component, initialize and load the second state of the second application accessing the component, and execute the second application via the component based on the second state.

Abstract: A microcontroller may have a central processing unit (CPU); a programmable logic device receiving input signals and having input/outputs coupled with external pins, and an interrupt control unit receiving at least one of the internal input signals or being coupled with at least one of the input/outputs and generating an interrupt signal fed to the CPU.

Abstract: A microcontroller or integrated system has a bus, a plurality of peripheral devices each one coupled with the bus, a non-volatile memory, and a state machine coupled with the non-volatile memory and being operable to initialize the peripheral devices by reading initialization information from the non-volatile memory and writing it to the peripheral devices.

Abstract: A microcontroller may have a central processing unit (CPU); a programmable logic device receiving input signals and having input/outputs coupled with external pins, and an interrupt control unit receiving at least one of the internal input signals or being coupled with at least one of the input/outputs and generating an interrupt signal fed to the CPU.

Abstract: A microcontroller or integrated system has a bus, a plurality of peripheral devices each one coupled with the bus, a non-volatile memory, and a state machine coupled with the non-volatile memory and being operable to initialize the peripheral devices by reading initialization information from the non-volatile memory and writing it to the peripheral devices.