Abstract: The subject disclosure describes a structure and method that generates the average of two or more reference quantities (e.g., reference voltage potentials) and monitors the integrity of the voltage reference potentials. The subject technology produces a reference with improved accuracy and more accurate monitoring compared to traditional techniques. For example, the subject technology provides for a fault circuit that includes a monitoring circuit, and an averaging circuit configured to receive a plurality of reference signals and to produce an averaged reference signal based on the received plurality of reference signals. In some examples, the monitoring circuit is configured to receive the averaged reference signal from the averaging circuit, compare the averaged reference signal to each of the plurality of reference signals, and generate a fault signal when the averaged reference signal deviates from at least one of the plurality of reference signals by at least a threshold value.

Abstract: The subject disclosure describes a structure and method that generates the average of two or more reference quantities (e.g., reference voltage potentials) and monitors the integrity of the voltage reference potentials. The subject technology produces a reference with improved accuracy and more accurate monitoring compared to traditional techniques. For example, the subject technology provides for a fault circuit that includes a monitoring circuit, and an averaging circuit configured to receive a plurality of reference signals and to produce an averaged reference signal based on the received plurality of reference signals. In some examples, the monitoring circuit is configured to receive the averaged reference signal from the averaging circuit, compare the averaged reference signal to each of the plurality of reference signals, and generate a fault signal when the averaged reference signal deviates from at least one of the plurality of reference signals by at least a threshold value.

Abstract: A low noise current source circuit is disclosed for biasing a magnetoresistive (MR) read head. The current source comprises a field-effect transistor (FET) cascoded to a second transistor which, in turn, is coupled to the MR element. A filter device including a capacitor is coupled across the gate-source junction of the FET, and a sensing device, such as a resistor, is coupled to the gate of the FET for detecting current flowing into said capacitor. Boost circuitry, coupled to the sensing device, boosts the charge/discharge rate of the filter capacitor when the voltage of the sensing device exceeds a certain threshold.