Patents by Inventor Gregg S. Goyins

Gregg S. Goyins has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7339563
    Abstract: The invention is directed towards high performance switchable polarizers for optical projection displays. One embodiment of the invention is a switchable polarizer with (1) two conductive electrodes and (2) a liquid crystal material that is positioned between the two conductive electrodes. The electrodes apply a uniform electric field across the liquid crystal material when one of the electrodes is placed at a first potential and other electrode is placed at a second potential different from the first potential. These two electrodes also heat the liquid crystal material when they conduct current. When equal currents are drawn through the electrodes, the electrodes apply a uniform electric field across the liquid crystal during a heating operation.
    Type: Grant
    Filed: February 1, 2000
    Date of Patent: March 4, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Gregg S. Goyins, Robert J. Lawton
  • Patent number: 7023412
    Abstract: One embodiment of the invention is a digital filter that avoids image flicker in a projection display that has two operational modes. This digital filter avoids undesired intensity variations between successive frames by changing all the assigned pixel values by the same amount during either of the two modes. This digital filter typically only needs to correct some of the least significant bits (“LSB's”) of the pixel values during either operational mode. This is because the dynamic range of the flicker is often very limited (e.g., it is often less than 5%). In fact, some embodiments combine the flicker-filtering function with the dither-control function, if the correction of a LSB causes an over correction of the flicker problem.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: April 4, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Gregg S. Goyins
  • Patent number: 6938201
    Abstract: An error detection system for detecting errors in data output from a FIFO memory includes a first CRC generator for receiving an inbound data stream and generating a first CRC value based on a data block in the inbound data stream. A device coupled to the first CRC generator selectively inputs the data block and the first CRC value into the FIFO. A second CRC generator generates a second CRC value based on the data block after being output from the FIFO in an outbound data stream. The second CRC value indicates whether the data block contains an error.
    Type: Grant
    Filed: September 5, 2002
    Date of Patent: August 30, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: Gregg S. Goyins, Narayan R. Ayalasomayajula
  • Patent number: 6756987
    Abstract: Some embodiments of a data channel that interleaves read and write access to a frame buffer include a bit-plane storage device, a single frame buffer, a data controller and a digital pixel display. Transferring data through the single frame buffer by interleaving reads and writes includes (1) alternately writing to the frame buffer and reading from the frame buffer portions of each bit-plane of a sequence bit-plane data; and (2) writing to said frame buffer so as to replace each said portion of a bit-plane in the frame buffer with a corresponding portion of a next bit-plane. By interleaving read and write accesses, a single frame buffer and less interface logic are necessary to transfer data from a storage device to a digital pixel display. In a three channel digital color pixel imaging device, this reduces the number of frame buffer SDRAM units from six to three, and significantly reduces the overall cost associated with implementing data flow through the data storage and frame buffer blocks.
    Type: Grant
    Filed: April 20, 2001
    Date of Patent: June 29, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Gregg S. Goyins, John R. McVey
  • Publication number: 20040049726
    Abstract: An error detection system for detecting errors in data output from a FIFO memory includes a first CRC generator for receiving an inbound data stream and generating a first CRC value based on a data block in the inbound data stream. A device coupled to the first CRC generator selectively inputs the data block and the first CRC value into the FIFO. A second CRC generator generates a second CRC value based on the data block after being output from the FIFO in an outbound data stream. The second CRC value indicates whether the data block contains an error.
    Type: Application
    Filed: September 5, 2002
    Publication date: March 11, 2004
    Inventors: Gregg S. Goyins, Narayan R. Ayalasomayajula
  • Publication number: 20030132904
    Abstract: One embodiment of the invention is a digital filter that avoids image flicker in a projection display that has two operational modes. This digital filter avoids undesired intensity variations between successive frames by changing all the assigned pixel values by the same amount during either of the two modes. This digital filter typically only needs to correct some of the least significant bits (“LSB's”) of the pixel values during either operational mode. This is because the dynamic range of the flicker is often very limited (e.g., it is often less than 5%). In fact, some embodiments combine the flicker-filtering function with the dither-control function, if the correction of a LSB causes an over correction of the flicker problem.
    Type: Application
    Filed: February 28, 2003
    Publication date: July 17, 2003
    Inventor: Gregg S. Goyins
  • Patent number: 6545672
    Abstract: One embodiment of the invention is a digital filter that avoids image flicker in a projection display that has two operational modes. This digital filter avoids undesired intensity variations between successive frames by changing all the assigned pixel values by the same amount during either of the two modes. This digital filter typically only needs to correct some of the least significant bits (“LSB's”) of the pixel values during either operational mode. This is because the dynamic range of the flicker is often very limited (e.g., it is often less than 5%). In fact, some embodiments combine the flicker-filtering function with the dither-control function, if the correction of a LSB causes an over correction of the flicker problem.
    Type: Grant
    Filed: July 19, 2000
    Date of Patent: April 8, 2003
    Assignee: Hewlett Packard Development Company, L.P.
    Inventor: Gregg S. Goyins
  • Publication number: 20020154129
    Abstract: Some embodiments of a data channel that interleaves read and write access to a frame buffer include a bit-plane storage device, a single frame buffer, a data controller and a digital pixel display. Transferring data through the single frame buffer by interleaving reads and writes includes (1) alternately writing to the frame buffer and reading from the frame buffer portions of each bit-plane of a sequence bit-plane data; and (2) writing to said frame buffer so as to replace each said portion of a bit-plane in the frame buffer with a corresponding portion of a next bit-plane. By interleaving read and write accesses, a single frame buffer and less interface logic are necessary to transfer data from a storage device to a digital pixel display. In a three channel digital color pixel imaging device, this reduces the number of frame buffer SDRAM units from six to three, and significantly reduces the overall cost associated with implementing data flow through the data storage and frame buffer blocks.
    Type: Application
    Filed: April 20, 2001
    Publication date: October 24, 2002
    Inventors: Gregg S. Goyins, John R. McVey
  • Patent number: 6246395
    Abstract: There is provided a method and apparatus for categorizing substantially simultaneous inputs to a touchscreen. The method is described within a computer device having a display screen adapted to receive touchscreen input. In a first step, the display screen is divided into a plurality of sectors. Next, the sectors are sequentially scanned for input. When a plurality of substantially simultaneous inputs are sensed in respective sectors, the location by sector of each input is ascertained. A unique value is then assigned to each input received, the assigned values corresponding to the sequence in time of the respective inputs based upon the sequentially scanned sectors in which the inputs occurred. The apparatus includes a display screen adapted to receive touchscreen input. A touchscreen driver/sensor is provided to divide the display screen into a plurality of sectors and to sense input in each of the sectors.
    Type: Grant
    Filed: December 17, 1998
    Date of Patent: June 12, 2001
    Assignee: Hewlett-Packard Company
    Inventors: Gregg S. Goyins, Mark F. Resman