Patents by Inventor Gregor D. Dougal

Gregor D. Dougal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit stack including a patterned array of electrically conductive pillars
    Patent number: 9997466
    Abstract: The present disclosure describes a stacked integrated circuit system that includes two integrated circuit layers stacked on opposite sides of an interposer layer. The interposer layer may include at least one integrated circuit die and an interposer portion that includes a plurality of electrically conductive pillars arranged in a laterally patterned array within the interposer layer.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: June 12, 2018
    Assignee: Honeywell International Inc.
    Inventors: Eric E. Vogt, Gregor D. Dougal, James L. Tucker
  • INTEGRATED CIRCUIT STACK INCLUDING A PATTERNED ARRAY OF ELECTRICALLY CONDUCTIVE PILLARS
    Publication number: 20170125352
    Abstract: The present disclosure describes a stacked integrated circuit system that includes two integrated circuit layers stacked on opposite sides of an interposer layer. The interposer layer may include at least one integrated circuit die and an interposer portion that includes a plurality of electrically conductive pillars arranged in a laterally patterned array within the interposer layer.
    Type: Application
    Filed: November 15, 2016
    Publication date: May 4, 2017
    Inventors: Eric E. Vogt, Gregor D. Dougal, James L. Tucker
  • Integrated circuit stack including a patterned array of electrically conductive pillars
    Patent number: 9548277
    Abstract: The present disclosure describes a stacked integrated circuit system that includes two integrated circuit layers stacked on opposite sides of an interposer layer. The interposer layer may include at least one integrated circuit die and an interposer portion that includes a plurality of electrically conductive pillars arranged in a laterally patterned array within the interposer layer.
    Type: Grant
    Filed: April 21, 2015
    Date of Patent: January 17, 2017
    Assignee: Honeywell International Inc.
    Inventors: Eric E. Vogt, Gregor D. Dougal, James L. Tucker
  • INTEGRATED CIRCUIT STACK INCLUDING A PATTERNED ARRAY OF ELECTRICALLY CONDUCTIVE PILLARS
    Publication number: 20160315055
    Abstract: The present disclosure describes a stacked integrated circuit system that includes two integrated circuit layers stacked on opposite sides of an interposer layer. The interposer layer may include at least one integrated circuit die and an interposer portion that includes a plurality of electrically conductive pillars arranged in a laterally patterned array within the interposer layer.
    Type: Application
    Filed: April 21, 2015
    Publication date: October 27, 2016
    Inventors: Eric E. Vogt, Gregor D. Dougal, James L. Tucker
  • Random access memory cell resistant to radiation induced upsets
    Patent number: 5631863
    Abstract: A radiation resistant random access memory cell which has a coupling circuit between a storage node of a first CMOS pair and a gate node of a second CMOS pair. The coupling circuit is controlled by a word line and provides a first resistive element between the storage node and the body of the coupling circuit and a second resistive element between the gate node and the body of the coupling circuit.
    Type: Grant
    Filed: January 16, 1996
    Date of Patent: May 20, 1997
    Assignee: Honeywell Inc.
    Inventors: Paul S. Fechner, Gregor D. Dougal, Keith W. Golke