Patents by Inventor Gregory A. Dabney

Gregory A. Dabney has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7847575
    Abstract: Various methods and apparatus for electrically probe testing a semiconductor chip with circuit perturbation are disclosed. In one aspect, a method of testing is provided that includes contacting a first nano probe to a conductor structure on a first side of a semiconductor chip. The semiconductor chip has plural circuit structures. A external stimulus is applied to a selected portion of the first side of the semiconductor chip to perturb at least one of the plural circuit structures. The semiconductor chip is caused to perform a test pattern during the application of the external stimulus. An electrical characteristic of the semiconductor chip is sensed with the first nano probe during performance of the test pattern.
    Type: Grant
    Filed: July 28, 2008
    Date of Patent: December 7, 2010
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Ronald M. Potok, Gregory A. Dabney, Abdullah M. Yassine
  • Publication number: 20100019786
    Abstract: Various methods and apparatus for electrically probe testing a semiconductor chip with circuit perturbation are disclosed. In one aspect, a method of testing is provided that includes contacting a first nano probe to a conductor structure on a first side of a semiconductor chip. The semiconductor chip has plural circuit structures. A external stimulus is applied to a selected portion of the first side of the semiconductor chip to perturb at least one of the plural circuit structures. The semiconductor chip is caused to perform a test pattern during the application of the external stimulus. An electrical characteristic of the semiconductor chip is sensed with the first nano probe during performance of the test pattern.
    Type: Application
    Filed: July 28, 2008
    Publication date: January 28, 2010
    Inventors: Ronald M. Potok, Gregory A. Dabney, Abdullah M. Yassine
  • Patent number: 6897664
    Abstract: Apparatus for and methods of inspection using laser beam induced alteration are provided. In one aspect, an apparatus is provided that includes a laser scanning microscope for directing a laser beam at a circuit structure and a source for biasing and thereby establishing a power condition in the circuit structure. A detection circuit is provided for detecting a change in the power condition in response to illumination of the circuit structure by the laser beam and generating a first output signal based on the detected change. A signal processor is provided for processing the first output signal and generating a second output signal based thereon. A control system is operable to scan the laser beam according to a pattern that has a plurality of pixel locations, whereby the laser beam may be moved to a given pixel location and allowed to dwell there for a selected time before being moved to another pixel location.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: May 24, 2005
    Assignees: Advanced Micro Devices, Inc., Semicaps Pte Ltd.
    Inventors: Michael Bruce, Gregory A. Dabney, Palaniappan Muthupalaniappan, Jiann Min Chin, Richard Jacob Wilcox, Glen Gilfeather, Brennan Davis, Jacob Phang, Choon Meng Chua, Lian Ser Koh, Hoo-Yin Ng, Soon Huat Tan
  • Patent number: 6410349
    Abstract: According to an example embodiment of the present invention, an electronic circuit is formed upon a front side surface of a semiconductor device having a back side opposite the front side. At least one layer of antireflective material is formed within substrate in the semiconductor device. The circuit is stimulated and a response is analyzed. The use of the antireflective layer reduces interference generated by reflections and improves the ability to analyze the circuit.
    Type: Grant
    Filed: August 30, 1999
    Date of Patent: June 25, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Michael R. Bruce, Victoria J. Bruce, Gregory A. Dabney
  • Patent number: 6107107
    Abstract: Various methods are described for analyzing an electronic circuit formed upon a frontside surface of a semiconductor substrate having opposed frontside and backside surfaces. Each method includes forming a layer of an antireflective coating material upon the backside surface of the substrate prior to detecting electromagnetic radiation emanating from the backside surface. The layer of an antireflective coating material reduces reflections which contribute to background noise levels. As a result of reduced background noise levels, the detection capabilities of the methods and the resolutions of any scanned images produced using the methods are improved. A first method includes forming a layer of an antireflective coating material upon the backside surface of the substrate, directing a beam of electromagnetic radiation toward the backside surface of the substrate, and detecting an electrical response from the electronic circuit.
    Type: Grant
    Filed: March 31, 1998
    Date of Patent: August 22, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Victoria J. Bruce, Gregory A. Dabney