Abstract: The invention discloses a method for attaching solder members (114) to a substrate (112). The method includes forming a decal (110) with a plurality of solder members (114). The method further comprises aligning the decal (110) with the substrate (112) and transferring the solder members (114) on the decal (110) to the substrate (112).

Abstract: A conductive via pattern (110) between the uppermost metal interconnect layer (Mn) and next underlying metal interconnect layer (Mn−1) in the bond pad areas strengthens the interlevel dielectric (ILD3) between metal layers (Mn and Mn−1). The conductive via layer (110) may, for example, comprise parallel rails (114) or a grid of cross-hatch rails (116). By spreading the stress concentration laterally, the conductive via layer (110) inhibits micro-cracking from stress applied to the bond pad (112).

Abstract: The invention discloses a method for attaching solder members (114) to a substrate (112). The method includes forming a decal (110) with a plurality of solder members (114). The method further comprises aligning the decal (110) with the substrate (112) and transferring the solder members (114) on the decal (110) to the substrate (112).

Abstract: The invention discloses a method for attaching solder members (114) to a substrate (112). The method includes forming a decal (110) with a plurality of solder members (114). The method further comprises aligning the decal (110) with the substrate (112) and transferring the solder members (114) on the decal (110) to the substrate (112).

Abstract: A semiconductor wafer is disclosed comprising a substrate having a surface carrying an array of integrated circuit chips bordered by dicing lines; at least two sets of substantially parallel structures within each of said dicing lines, each set extending along the edge of a chip on opposite sides of each dicing line, respectively; each of said sets comprising at least one continuous barrier wall adjacent each chip, respectively, and a sacrificial composite structure in combination therewith, between said wall and the center of the dicing line, said composite structure including means of dispersing the energy associated with crack propagation, whereby any crack having sufficient energy to penetrate the composite structure will be transformed into a plurality of weaker cracks, non of which will be capable of penetrating said wall.

Abstract: A conductive via pattern (110) between the uppermost metal interconnect layer (Mn ) and next underlying metal interconnect layer (Mn−1) in the bond pad areas strengthens the interlevel dielectric (ILD3) between metal layers (Mn and Mn−1). The conductive via layer (110) may, for example, comprise parallel rails (114) or a grid of cross-hatch rails (116). By spreading the stress concentration laterally, the conductive via layer (110) inhibits micro-cracking from stress applied to the bond pad (112).

Abstract: A semiconductor wafer is disclosed comprising a substrate having a surface carrying an array of integrated circuit chips bordered by dicing lines; at least two sets of substantially parallel structures within each of said dicing lines, each set extending along the edge of a chip on opposite sides of each dicing line, respectively; each of said sets comprising at least one continuous barrier wall adjacent each chip, respectively, and a sacrificial composite structure in combination therewith, between said wall and the center of the dicing line, said composite structure including means of dispersing the energy associated with crack propagation, whereby any crack having sufficient energy to penetrate the composite structure will be transformed into a plurality of weaker cracks, non of which will be capable of penetrating said wall.

Abstract: A method for loading solder particles (14) onto an substrate comprising applying a flux (18) directly onto solder particles (14) either prior to or following adhering the solder particles (14) onto adhesive areas (30) of an adhesive coated film (20). The adhesive areas (30) of the adhesive coated film (20) are oriented to correspond with contact pads (42) of a substrate (16). The adhesive coated film (20) is aligned with the substrate (16) to transfer the solder particles (14) to the contact pads (42). The solder particles (14) may then be reflowed to securely attach the solder particles (14) to the contact pads(42).

Abstract: An apparatus for mass fabrication of a semiconductor assembly comprising optical sources for supplying radiant energy for rapid and controlled heating of a multitude of integrated circuit chips and substrates. The resultant thermal profile is applied to reflowing solder interconnections as well as to filling chip-to-substrate gaps with polymeric precursors whereby any mechanical stress detrimental to mechanically weak solder joints and dielectric layers is avoided. The apparatus contains dispensing equipment with multiple degrees of freedom so that the chips and substraters to be assembled do not have to be moved within or from the apparatus. Processing in controlled environment is feasible.

Abstract: A method for attaching particles (12) to a substrate (14), comprising the steps of aligning particles (12) attached to an adhesive sheet (35) with contact pads (42) of a substrate (14), transferring thermal energy (38) to the adhesive sheet (35) by maintaining a temperature below the melting point of particles (12), and removing the adhesive sheet (35) prior to reflow, is disclosed. The adhesive sheet (35) may be composed of an adhesive coating (22) laminated to a film (24). The particles may be composed of a variety of compositions, including compounds such as solder or plastic, for example.

Abstract: A method for assembling electronic devices by moving particles (12) on an adhesive sheet (35) having a plurality of adhesive areas (30), comprising the steps of loading the particles (12) onto the adhesive sheet (35) and transferring kinetic energy from a mechanical device (39) to the particles (12) for moving the particles (12) is disclosed. The adhesive sheet (35) may be composed of an adhesive coating (22) laminated to a film (24). The particles (12) may be composed of a variety of materials, including minerals and compounds such as solder or polymers.

Abstract: A novel technique for measuring the temperature of an electronic circuit undergoing assembly packaging processes includes a non-contact infrared detector which is used to measure the temperature of the die allowing a control systems to directly adjust the die temperature. Previous to this invention, the die temperatures were controlled indirectly, typically by controlling ambient temperature in an oven or furnace to a series of set point values during curing of the electronic packaging materials.

Abstract: A method for populating an substrate (14) with particles (12, 16), comprising the steps of applying an adhesive coating (22) to both surfaces of a substrate (14) and loading the particles (12, 16) to the adhesive areas (30) of the adhesive coating (22), such that each surface of the substrate (14) is fully populated with the particles (12, 16) which may thereafter be reflowed simultaneously. The particles may be composed of a variety of compositions, including copper, other metals, alloys, and synthetic resin compounds, such as conductive plastics.

Abstract: The invention discloses a method for forming solder (114) on a substrate (112). The method includes forming a decal (110) with a plurality of solder regions (113). The method further comprises aligning the decal (110) with the substrate (112) and transferring the solder regions (113) on the decal (110) to the substrate (112).

Abstract: A cover (14) for an array (12) of foil matrix-mounted (18), spaced photovoltaic members (16) protects the array (12) from the environment and increases its efficiency. Upper portions (31) of the members (16) extend above the free reflective surface (20T) of the foil matrix (18). The cover (14)includes an environment-excluding coating (60) which is emplaced on the array (12) to conform to the upper portions (31). The coating is configured as cusps (68) which overlie the free surface (20T) of the matrix (18) centrally between adjacent members (16). The nadirs (72) of the cusps (68) are closely spaced from the free surface (20T). Accordingly, each member (16) effectively supports a conformal lens (70) which directs thereat much of the otherwise "wasted" light that would fall on the free foil surface (20T) between adjacent members (16) and would not fall on the members (16).

Abstract: Solar cells are formed of semi-conductor spheres of P-type interior having an N-type skin are pressed between a pair of aluminum foil members forming the electrical contacts to the P-type and N-type regions. The aluminum foils, which comprise 1.0% silicon by weight, are flexible and electrically insulated from one another. The sphere are patterned in a foil matrix forming a cell Multiple cells can be interconnected to form a module of solar cell elements for converting sun light into electricity.

Abstract: Solar cells are formed of semi-conductor spheres of P-type interior having an N-type skin are pressed between a pair of aluminum foil members forming the electrical contacts to the P-type and N-type regions. The aluminum foils, which comprise 1.0% silicon by weight, are flexible and electrically insulated from one another. The spheres are patterned in a foil matrix forming a cell. Multiple cells can be interconnected to form a module of solar cell elements for converting sun light into electricity.

Abstract: Solar cells are formed of semi-conductor spheres of P-type interior having an N-type skin are pressed between a pair of aluminum foil members forming the electrical contacts to the P-type and N-type regions. The aluminum foils, which comprise 1.0% silicon by weight, are flexible and electrically insulated from one another. The spheres are patterned in a foil matrix forming a cell. Multiple cells can be interconnected to form a module of solar cell elements for converting sun light into electricity.

Abstract: Solar cells formed of semiconductor discrete spheres of P-type interior having an N-type skin are disclosed. The semiconductor spheres are pressed between a pair of aluminum foil members. A plurality of metal pads are formed to the P-type material of the discrete spheres to provide electrical contacts. The aluminum foils are flexible and electrically insulated from one another. One of the foils is electrically connected to the N-type skin of the discrete semiconductor sphere, and the other is electrically connected to the P-type interior of the sphere by means of the metal pads. The cells are patterned in a foil matrix forming an array. Multiple arrays can be interconnected to form a module of solar cell elements for converting sun light into electricity.

Abstract: Solar spheres are formed of semi-conductor spheres of P-type interior having an N-type skin are pressed between a pair of aluminum foil members forming the electrical contacts to the P-type and N-type regions. The aluminum foils, which comprise 1.0% silicon by weight, are flexible and electrically insulated from one another. The spheres are patterned in a foil matrix forming a cell. Multiple cells can be interconnected to form a module of solar cell elements for converting sun light into electricity.