Patents by Inventor Gregory Bellynck

Gregory Bellynck has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11923487
    Abstract: In an embodiment a method includes providing a carrier with an optoelectronic semiconductor chip-component arranged on a top side of the carrier, arranging a first potting material on the top side of the carrier, arranging a second potting material on the first potting material, wherein the second potting material comprises a higher density than the first potting material, wherein a top side of the optoelectronic semiconductor chip-component is covered by neither the first potting material nor the second potting material and allowing a force to act on the first potting material and the second potting material such that the second potting material migrates in a direction toward the top side of the carrier.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: March 5, 2024
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Gregory Bellynck, Ivar Tangring
  • Patent number: 11404611
    Abstract: In an embodiment a method for producing a semiconductor device includes providing a carrier with a semiconductor component arranged on the carrier, providing a layer arrangement on the carrier, the layer arrangement adjoining the semiconductor component and comprising a first and a second flowable layer, wherein the first layer is formed on the carrier and then the second layer is formed on the first layer, wherein the first layer comprises particles, wherein a density of the first layer is greater than a density of the second layer, and wherein a lateral wetting of the semiconductor component with the first layer occurs such that the first layer comprises a first configuration comprising a curved layer surface laterally with respect to the semiconductor component, and centrifuging the carrier such that the first layer comprises a second configuration as a result, wherein the first layer cannot return to the first configuration since the second layer is arranged on the first layer.
    Type: Grant
    Filed: August 16, 2018
    Date of Patent: August 2, 2022
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Ivar Tangring, Gregory Bellynck
  • Publication number: 20220020902
    Abstract: In an embodiment a method includes providing a carrier with an optoelectronic semiconductor chip-component arranged on a top side of the carrier, arranging a first potting material on the top side of the carrier, arranging a second potting material on the first potting material, wherein the second potting material comprises a higher density than the first potting material, wherein a top side of the optoelectronic semiconductor chip-component is covered by neither the first potting material nor the second potting material and allowing a force to act on the first potting material and the second potting material such that the second potting material migrates in a direction toward the top side of the carrier.
    Type: Application
    Filed: December 3, 2019
    Publication date: January 20, 2022
    Inventors: Gregory Bellynck, Ivar Tangring
  • Publication number: 20200251624
    Abstract: In an embodiment a method for producing a semiconductor device includes providing a carrier with a semiconductor component arranged on the carrier, providing a layer arrangement on the carrier, the layer arrangement adjoining the semiconductor component and comprising a first and a second flowable layer, wherein the first layer is formed on the carrier and then the second layer is formed on the first layer, wherein the first layer comprises particles, wherein a density of the first layer is greater than a density of the second layer, and wherein a lateral wetting of the semiconductor component with the first layer occurs such that the first layer comprises a first configuration comprising a curved layer surface laterally with respect to the semiconductor component, and centrifuging the carrier such that the first layer comprises a second configuration as a result, wherein the first layer cannot return to the first configuration since the second layer is arranged on the first layer.
    Type: Application
    Filed: August 16, 2018
    Publication date: August 6, 2020
    Inventors: Ivar Tangring, Gregory Bellynck
  • Patent number: 8030744
    Abstract: An electrical connection arrangement between a semiconductor circuit arrangement and an external contact device, and to a method for producing the connection arrangement is disclosed. In one embodiment, a metallic layer is deposited onto at least one contact terminal and/or the contacts and the wire, the metallic layer protecting the contact terminal or the electrical connection against ambient influences and ensuring a high reliability.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: October 4, 2011
    Assignee: Infineon Technologies AG
    Inventors: Thomas Laska, Matthias Stecher, Gregory Bellynck, Khalil Hosseini, Joachim Mahler
  • Publication number: 20100213613
    Abstract: An electrical connection arrangement between a semiconductor circuit arrangement and an external contact device, and to a method for producing the connection arrangement is disclosed. In one embodiment, a metallic layer is deposited onto at least one contact terminal and/or the contacts and the wire, the metallic layer protecting the contact terminal or the electrical connection against ambient influences and ensuring a high reliability.
    Type: Application
    Filed: April 29, 2010
    Publication date: August 26, 2010
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Thomas Laska, Matthias Stecher, Gregory Bellynck, Khalil Hosseini, Joachim Mahler
  • Patent number: 7709938
    Abstract: An electrical connection arrangement between a semiconductor circuit arrangement and an external contact device, and to a method for producing the connection arrangement is disclosed. In one embodiment, a metallic layer is deposited onto at least one contact terminal and/or the contacts and the wire, the metallic layer protecting the contact terminal or the electrical connection against ambient influences and ensuring a high reliability.
    Type: Grant
    Filed: June 22, 2006
    Date of Patent: May 4, 2010
    Assignee: Infineon Technologies AG
    Inventors: Thomas Laska, Matthias Stecher, Gregory Bellynck, Khalil Hosseini, Joachim Mahler
  • Publication number: 20070001283
    Abstract: An electrical connection arrangement between a semiconductor circuit arrangement and an external contact device, and to a method for producing the connection arrangement is disclosed. In one embodiment, a metallic layer is deposited onto at least one contact terminal and/or the contacts and the wire, the metallic layer protecting the contact terminal or the electrical connection against ambient influences and ensuring a high reliability.
    Type: Application
    Filed: June 22, 2006
    Publication date: January 4, 2007
    Inventors: Thomas Laska, Matthias Stecher, Gregory Bellynck, Khalil Hosseini, Joachim Mahler