Abstract: A method and apparatus provides context switching of logic in an integrated circuit using one or more test scan circuits that use test data during a test mode of operation of the integrated circuit to store and/or restore non-test data during normal operation of the integrated circuit. The integrated circuit includes context control logic operative to control the test scan circuit to at least one of: store and restore context state information contained in functional storage elements in response to detection of a request for a change in context during normal operation of the integrated circuit.

Abstract: The embodiments of the present invention provide an improved tape measure. According to one embodiment, the concave and convex surfaces of the tape measure are etched, scribed, or printed with markings and numbers at fixed intervals. According to another embodiment, the markings and numbers on the convex surface are the same as the markings and numbers on the concave surface. According to another embodiment, the markings and numbers on the convex surface are different from the markings and numbers on the concave surface.

Abstract: Embodiments of the present invention are directed to a method and apparatus for delayed answering of a telecommunications request. In one embodiment of the present invention, a receiver of a telecommunications request initiates a delayed answer system. The delayed answering system indicates to the caller that the receiver intends to answer the call, but needs a few moments before doing so. In one embodiment, once the delayed answering system is activated, a message is relayed to the caller. In one embodiment, the message is a standard message. In another embodiment, the message is a personalized message. In yet another embodiment, the message is selected from a plurality of potential messages. In one embodiment, the message is selected based in full or in part upon the identification of the caller. In another embodiment, the receiver influences the selection of the message through the receiver's initiating keystrokes.

Abstract: A computer graphics system having a hyperpipe architecture. Multiple rendering pipes are coupled together through a hyperpipe network scheme. Each of the rendering pipes are capable of rendering primitives for an entire frame or portions thereof. This enables multiple rendering pipes to process graphics data at the same time. A controller coordinates the multiple rendering pipes by sending requests to the appropriate rendering pipes to retrieve the pixel data generated by that particular pipe. It then merges the pixel data received from the various rendering pipes. A single driver then draws the three-dimensional image out for display.