Patents by Inventor Gregory Clark

Gregory Clark has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210407167
    Abstract: A hierarchical acceleration structure is generated for intersection testing in a ray tracing system. Nodes of the hierarchical acceleration structure are determined, wherein each of the nodes represents a region in a scene, and wherein the nodes are linked to form the hierarchical acceleration structure. Data is stored representing the hierarchical acceleration structure. The stored data defines the regions represented by a plurality of the nodes of the hierarchical acceleration structure. At least one node is an implicitly represented node, wherein data defining a region represented by an implicitly represented node is not explicitly included as part of the stored data but can be inferred from the stored data.
    Type: Application
    Filed: June 26, 2020
    Publication date: December 30, 2021
    Inventors: Gregory Clark, Steven J. Clohset
  • Publication number: 20210407172
    Abstract: Ray tracing systems and computer-implemented methods perform intersection testing on a bundle of rays with respect to a box. Silhouette edges of the box are identified from the perspective of the bundle of rays. For each of the identified silhouette edges, components of a vector providing a bound to the bundle of rays are obtained and it is determined whether the vector passes inside or outside of the silhouette edge. Results of determining, for each of the identified silhouette edges, whether the vector passes inside or outside of the silhouette edge, are used to determine an intersection testing result for the bundle of rays with respect to the box.
    Type: Application
    Filed: June 29, 2020
    Publication date: December 30, 2021
    Inventors: Gregory Clark, Steven J. Clohset, Luke T. Peterson
  • Publication number: 20210407173
    Abstract: Ray tracing systems and computer-implemented methods perform intersection testing on a bundle of rays with respect to a box. A bundle of rays to be tested for intersection with a box is received, and a first bundle intersection test is performed to determine whether or not all of the rays of the bundle intersect the box, wherein if the first bundle intersection test determines that all of the rays of the bundle intersect the box, an intersection testing result for the bundle with respect to the box is that all of the rays of the bundle intersect the box. If the first bundle intersection test does not determine that all of the rays of the bundle intersect the box, a second bundle intersection test is performed, which determines whether or not all of the rays of the bundle miss the box, the result of which is used to determine the intersection testing result for the bundle with respect to the box.
    Type: Application
    Filed: June 29, 2020
    Publication date: December 30, 2021
    Inventors: Gregory Clark, Steven J. Clohset, Luke T. Peterson
  • Patent number: 11078767
    Abstract: A method and apparatus for desalinating water combined with power generation, wherein a desalination system is used for desalinating aquifer brine water and is operationally related to a power generation system, wherein such dual-purpose co-generation facility captures the natural gas entrained within the aquifer brine water.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: August 3, 2021
    Inventors: Henry D. Tiffany, III, Steven Bryant, Gregory A Clark, Brian H. de Clare, Gary A. Pope
  • Publication number: 20210192829
    Abstract: A ray-tracing system for performing intersection testing includes a tester module for testing rays for intersection with a volume, the tester module receiving a packet of one or more rays to be tested for intersection with the volume. A first set of one or more testers performs intersection testing at a first level of precision to provide intersection testing results, wherein for a first type of the intersection testing result from the first set of one or more testers intersection testing does not need to be reperformed at a second level of precision greater than the first level of precision, and for a second type of the intersection testing result from the first set of one or more testers intersection testing is to be reperformed at the second level of precision; and a second set of one or more testers configured to perform intersection testing at the second level of precision.
    Type: Application
    Filed: March 3, 2021
    Publication date: June 24, 2021
    Inventors: Gregory Clark, Steven J. Clohset, Luke T. Peterson, Naser Sedaghati, Ali Rabbani
  • Publication number: 20210174572
    Abstract: Methods and ray tracing units are provided for performing intersection testing for use in rendering an image of a 3-D scene. A hierarchical acceleration structure may be traversed by traversing one or more upper levels of nodes of the hierarchical acceleration structure according to a first traversal technique, the first traversal technique being a depth-first traversal technique; and traversing one or more lower levels of nodes of the hierarchical acceleration structure according to a second traversal technique, the second traversal technique not being a depth-first traversal technique. Results of traversing the hierarchical acceleration structure are used for rendering the image of the 3-D scene. The upper levels of the acceleration structure may be defined according to a spatial subdivision structure, whereas the lower levels of the acceleration structure may be defined according to a bounding volume structure.
    Type: Application
    Filed: February 22, 2021
    Publication date: June 10, 2021
    Inventors: Gregory Clark, John W. Howson, Justin DeCell, Steven J. Clohset
  • Patent number: 10970914
    Abstract: A ray-tracing system configured to perform intersection testing, comprising: a tester module for testing rays for intersection with a volume, the tester module being configured to receive a packet of one or more rays to be tested for intersection with the volume, wherein the tester module comprises: a first set of one or more testers configured to perform intersection testing at a first level of precision to provide intersection testing results, wherein for a first type of the intersection testing result from the first set of one or more testers intersection testing does not need to be reperformed at a second level of precision greater than the first level of precision, and for a second type of the intersection testing result from the first set of one or more testers intersection testing is to be reperformed at the second level of precision; and a second set of one or more testers configured to perform intersection testing at the second level of precision; wherein the tester module is configured to: allocate
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: April 6, 2021
    Assignee: Imagination Technologies Limited
    Inventors: Gregory Clark, Steven J. Clohset, Luke T. Peterson, Naser Sedaghati, Ali Rabbani
  • Patent number: 10964090
    Abstract: Methods and ray tracing units are provided for performing intersection testing for use in rendering an image of a 3-D scene. A hierarchical acceleration structure may be traversed by: traversing one or more upper levels of nodes of the hierarchical acceleration structure according to a first traversal technique, the first traversal technique being a depth-first traversal technique; and traversing one or more lower levels of nodes of the hierarchical acceleration structure according to a second traversal technique, the second traversal technique not being a depth-first traversal technique. Results of traversing the hierarchical acceleration structure are used for rendering the image of the 3-D scene. The upper levels of the acceleration structure may be defined according to a spatial subdivision structure, whereas the lower levels of the acceleration structure may be defined according to a bounding volume structure.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: March 30, 2021
    Assignee: Imagination Technologies Limited
    Inventors: Gregory Clark, John W. Howson, Justin DeCell, Steven J. Clohset
  • Publication number: 20200351503
    Abstract: A method of converting 10-bit pixel data (e.g. 10:10:10:2 data) into 8-bit pixel data involves converting the 10-bit values to 7-bits or 8-bits and generating error values for each of the converted values. Two of the 8-bit output channels comprise a combination of a converted 7-bit value and one of the bits from the fourth input channel. A third 8-bit output channel comprises the converted 8-bit value and the fourth 8-bit output channel comprises the error values. In various examples, the bits of the error values may be interleaved when they are packed into the fourth output channel.
    Type: Application
    Filed: July 17, 2020
    Publication date: November 5, 2020
    Inventors: Ilaria Martinelli, Jeff Bond, Simon Fenney, Peter Malcolm Lacey, Gregory Clark
  • Patent number: 10757415
    Abstract: A method of converting 10-bit pixel data (e.g. 10:10:10:2 data) into 8-bit pixel data involves converting the 10-bit values to 7-bits or 8-bits and generating error values for each of the converted values. Two of the 8-bit output channels comprise a combination of a converted 7-bit value and one of the bits from the fourth input channel. A third 8-bit output channel comprises the converted 8-bit value and the fourth 8-bit output channel comprises the error values. In various examples, the bits of the error values may be interleaved when they are packed into the fourth output channel.
    Type: Grant
    Filed: June 29, 2019
    Date of Patent: August 25, 2020
    Assignee: Imagination Technologies Limited
    Inventors: Ilaria Martinelli, Jeff Bond, Simon Fenney, Peter Malcolm Lacey, Gregory Clark
  • Patent number: 10549099
    Abstract: A technology is described for an electronic peripheral nerve stimulation system. The electronic nerve stimulation system can include a stimulation device and an electrode array. The stimulation device can be operable to generate a high-frequency alternating current. The electrode array can be operable to apply the high-frequency alternating current received from the stimulation device to selected subpopulations of peripheral nerve fibers within a peripheral nerve to block transmission of neural signals along the selected subpopulations of peripheral nerve fibers within the peripheral nerve.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: February 4, 2020
    Assignee: University of Utah Research Foundation
    Inventors: David Kluger, Christopher Duncan, David Page, Gregory Clark, Tyler Davis, Suzanne Wendelken
  • Publication number: 20200007866
    Abstract: A method of converting 10-bit pixel data (e.g. 10:10:10:2 data) into 8-bit pixel data involves converting the 10-bit values to 7-bits or 8-bits and generating error values for each of the converted values. Two of the 8-bit output channels comprise a combination of a converted 7-bit value and one of the bits from the fourth input channel. A third 8-bit output channel comprises the converted 8-bit value and the fourth 8-bit output channel comprises the error values. In various examples, the bits of the error values may be interleaved when they are packed into the fourth output channel.
    Type: Application
    Filed: June 29, 2019
    Publication date: January 2, 2020
    Inventors: Ilaria Martinelli, Jeff Bond, Simon Fenney, Peter Malcolm Lacey, Gregory Clark
  • Patent number: 10489962
    Abstract: Methods and ray tracing units are provided for performing intersection testing for use in rendering an image of a 3-D scene. A hierarchical acceleration structure may be traversed by: traversing one or more upper levels of nodes of the hierarchical acceleration structure according to a first traversal technique, the first traversal technique being a depth-first traversal technique; and traversing one or more lower levels of nodes of the hierarchical acceleration structure according to a second traversal technique, the second traversal technique not being a depth-first traversal technique. Results of traversing the hierarchical acceleration structure are used for rendering the image of the 3-D scene. The upper levels of the acceleration structure may be defined according to a spatial subdivision structure, whereas the lower levels of the acceleration structure may be defined according to a bounding volume structure.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: November 26, 2019
    Assignee: Imagination Technologies Limited
    Inventors: Gregory Clark, John W. Howson, Justin DeCell, Steven J. Clohset
  • Publication number: 20190355166
    Abstract: Methods and ray tracing units are provided for performing intersection testing for use in rendering an image of a 3-D scene. A hierarchical acceleration structure may be traversed by: traversing one or more upper levels of nodes of the hierarchical acceleration structure according to a first traversal technique, the first traversal technique being a depth-first traversal technique; and traversing one or more lower levels of nodes of the hierarchical acceleration structure according to a second traversal technique, the second traversal technique not being a depth-first traversal technique. Results of traversing the hierarchical acceleration structure are used for rendering the image of the 3-D scene. The upper levels of the acceleration structure may be defined according to a spatial subdivision structure, whereas the lower levels of the acceleration structure may be defined according to a bounding volume structure.
    Type: Application
    Filed: August 1, 2019
    Publication date: November 21, 2019
    Inventors: Gregory Clark, John W. Howson, Justin DeCell, Steven J. Clohset
  • Patent number: D891258
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: July 28, 2020
    Assignee: TTI (Macao Commercial Offshore) Limited
    Inventors: Gregory Clark, Mohammed Irfan
  • Patent number: D891259
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: July 28, 2020
    Assignee: TTI (Macao Commercial Offshore) Limited
    Inventors: Gregory Clark, Mohammed Irfan
  • Patent number: D891260
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: July 28, 2020
    Assignee: TTI (Macao Commerical Offshore) Limited
    Inventors: Gregory Clark, Mohammed Irfan
  • Patent number: D902728
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: November 24, 2020
    Assignee: Techtronic Floor Care Technology Limited
    Inventors: Gregory Clark, Mohammed Irfan
  • Patent number: D902734
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: November 24, 2020
    Assignee: Techtronic Floor Care Technology Limited
    Inventors: Gregory Clark, Mohammed Irfan
  • Patent number: D911645
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: February 23, 2021
    Assignee: Techtronic Cordless GP
    Inventors: Gregory Clark, Juan Aviles Quintero