Patents by Inventor Gregory Clifford Smith

Gregory Clifford Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10573287
    Abstract: An electronic synthesizer instrument incorporating four bass pedals which can be played either with the heel or the toe of the foot, so as to allow the playing of all twelve notes in a chromatic octave with just the four pedals. The apparatus is an improvement upon existing bass pedal devices which enables easier playing of the bass parts for musicians simultaneously playing other instruments. The assignment of the pitch to the pedals is selectable, but two of the easiest-to-play embodiments are described in detail. The four pedals rock on a central pivot, each giving two distinct notes. Half pitches between notes addressed by adjacent pedals can be accessed by holding both adjacent pedals down.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: February 25, 2020
    Inventor: Gregory Clifford Smith
  • Publication number: 20200013382
    Abstract: An electronic synthesizer instrument incorporating four bass pedals which can be played either with the heel or the toe of the foot, so as to allow the playing of all twelve notes in a chromatic octave with just the four pedals. The apparatus is an improvement upon existing bass pedal devices which enables easier playing of the bass parts for musicians simultaneously playing other instruments. The assignment of the pitch to the pedals is selectable, but two of the easiest-to-play embodiments are described in detail. The four pedals rock on a central pivot, each giving two distinct notes. Half pitches between notes addressed by adjacent pedals can be accessed by holding both adjacent pedals down.
    Type: Application
    Filed: July 6, 2018
    Publication date: January 9, 2020
    Inventor: Gregory Clifford Smith
  • Publication number: 20010035558
    Abstract: An improved processing technique results in a structure which maximizes contact area by eliminating a sidewall spacer used to form LDD regions. A sacrificial spacer is provided during processing to form the LDD regions, and is then removed prior to further processing of the device. A sidewall spacer is then formed in a self-aligned contact from a later deposited oxide layer used as an interlevel dielectric. This leaves only a single oxide sidewall spacer alongside the gate electrode, maximizing the surface area available for the self-aligned contact itself.
    Type: Application
    Filed: October 5, 1999
    Publication date: November 1, 2001
    Inventors: GREGORY CLIFFORD SMITH, DANIEL KEITH SMITH
  • Patent number: 6025265
    Abstract: A method is provided for forming a landing pad of a semiconductor integrated circuit, and an integrated circuit formed according to the same. A plurality of conductive regions are formed over a substrate. A polysilicon landing pad is formed over at least one of the plurality of conductive regions. After the polysilicon is patterned and etched to form the landing pad, tungsten is then selectively deposited over the polysilicon to form a composite polysilicon/tungsten landing pad which is a good etch stop, a good barrier to aluminum/silicon interdiffusion and a good conductor.
    Type: Grant
    Filed: December 12, 1997
    Date of Patent: February 15, 2000
    Assignee: STMicroelectronics, Inc.
    Inventors: Robert Otis Miller, Gregory Clifford Smith
  • Patent number: 6022782
    Abstract: An improved processing technique results in a structure which maximizes contact area by eliminating a sidewall spacer used to form LDD regions. A sacrificial spacer is provided during processing to form the LDD regions, and is then removed prior to further processing of the device. A sidewall spacer is then formed in a self-aligned contact from a later deposited oxide layer used as an interlevel dielectric. This leaves only a single oxide sidewall spacer alongside the gate electrode, maximizing the surface area available for the self-aligned contact itself.
    Type: Grant
    Filed: May 30, 1997
    Date of Patent: February 8, 2000
    Assignee: STMicroelectronics, Inc.
    Inventors: Gregory Clifford Smith, Daniel Keith Smith
  • Patent number: 5828130
    Abstract: A method is provided for forming a landing pad of a semiconductor integrated circuit, and an integrated circuit formed according to the same. A plurality of conductive regions are formed over a substrate. A polysilicon landing pad is formed over at least one of the plurality of conductive regions. After the polysilicon is patterned and etched to form the landing pad, tungsten is then selectively deposited over the polysilicon to form a composite polysilicon/tungsten landing pad which is a good etch stop, a good barrier to aluminum/silicon interdiffusion and a good conductor.
    Type: Grant
    Filed: December 3, 1996
    Date of Patent: October 27, 1998
    Assignee: STMicroelectronics, Inc.
    Inventors: Robert Otis Miller, Gregory Clifford Smith
  • Patent number: 5719071
    Abstract: A method is provided for forming a landing pad of a semiconductor integrated circuit, and an integrated circuit formed according to the same. A plurality of conductive regions are formed over a substrate. A polysilicon landing pad is formed over at least one of the plurality of conductive regions. After the polysilicon is patterned and etched to form the landing pad, tungsten is then selectively deposited over the polysilicon to form a composite polysilicon/tungsten landing pad which is a good etch stop, a good barrier to aluminum/silicon interdiffusion and a good conductor.
    Type: Grant
    Filed: December 22, 1995
    Date of Patent: February 17, 1998
    Assignee: SGS-Thomson Microelectronics, Inc.
    Inventors: Robert Otis Miller, Gregory Clifford Smith