Abstract: A communication system involving an access point, a vehicle and a user is provided. The vehicle and user possess a registration code, the user possesses a public and private key pair, and the access point and vehicle possess certificates and associated private keys. The access point issues a certificate to the user associated with the user's public and private keys, and the certificate of the access point is known and trusted by the vehicle. The access point signs a message granting ownership of the vehicle to the user, and the identity of the user indicates the user's certificate. The vehicle conditionally accepts the ownership registration request of the user.

Abstract: A communication system involving an access point, a vehicle and a user is provided. The vehicle and user possess a registration code, the user possesses a public and private key pair, and the access point and vehicle possess certificates and associated private keys. The access point issues a certificate to the user associated with the user's public and private keys, and the certificate of the access point is known and trusted by the vehicle. The access point signs a message granting ownership of the vehicle to the user, and the identity of the user indicates the user's certificate. The vehicle conditionally accepts the ownership registration request of the user.

Abstract: A memory controller for a disk controller comprises a first memory that receives first and second write operations in a first order and that stores the first and second write operations and corresponding write operation data. A second memory stores a corresponding address for each of the write operations, wherein the corresponding addresses identify a location of the write operation data stored in the first memory. Controller logic determines whether the first write operation and the second write operation write data to a same track of a disk and transfers the write operation data from the first memory to a third memory in a second order when the first write operation and the second write operation write data to the same track, wherein the second order is different from the first order.

Abstract: A hard disk unit includes a disk, a controller microprocessor, a host bus interface, a buffer memory, a buffer memory controller, and a disk formatter. The bus interface receives write operations, and corresponding write operation data is stored in the buffer memory. The buffer memory controller includes address registers and block count registers. The microprocessor loads the address registers with the buffer memory addresses of multiple write operations and loads the block count registers with the size of the corresponding data. The microprocessor then issues a single command to the buffer memory controller to transfer the data from the buffer memory to the disk formatter. The address registers and block count registers enable the data of multiple write operations to be transferred and written to a disk in an order other than the order in which the write operations were received at the bus interface.