Patents by Inventor Gregory H. Efland
Gregory H. Efland has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8149904Abstract: Provided is a system and method for a modem including one or more processing paths. Also included is a number of interconnected modules sequentially arrayed along the one or more paths. Each module is configured to (i) process signals passed along the paths in accordance with the sequence and (ii) implement predetermined functions to perform the processing. Further, each of the modules has a particular degree of functional programmability and the degrees of functional programmability monotonically vary in accordance with the sequence.Type: GrantFiled: January 24, 2003Date of Patent: April 3, 2012Assignee: Broadcom CorporationInventors: Gregory H. Efland, Haixiang Liang, Kevin H. Peterson, Yuanjie Chen, Alan G. Corry, Nino P. Ferrario, Jeff Z. Guan, Meera Prahlad, Ilya Stomakhin, Yongbing Wan, Larry C. Yamano, Lin Yin, Gong-San Yu, George A. Papanicolaou
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Patent number: 7809902Abstract: Provided is a system and method for de-interleaving a data stream stored in a buffer having a plurality of memory locations. Each location has a memory width of (W) bytes and the data stream is formed of a number of data words each including (N) number of data bytes, and (N) is a non-integer multiple of the width (W). The method includes storing the data words into respective memory locations and appending each of the stored data words with number (X) of dummy bytes, a sum of (N)+(X) being an integer multiple of the width (W). The appended dummy bytes are then stored in the respective memory locations.Type: GrantFiled: January 24, 2003Date of Patent: October 5, 2010Assignee: Broadcom CorporationInventors: Gregory H. Efland, Jeff Z. Guan, Lin Yin
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Patent number: 7482964Abstract: An analog-to-digital converter (ADC) disposed in a data reception path to convert data from an analog format to a digital format is switched between two or more power modes to conserve power when data is not being received. ADC stays in a lower power-lower precision mode until an inbound data is detected, at which time the ADC switches to a higher power-higher precision mode to convert the data. Once data conversion is completed, the ADC switches back to the lower power-lower precision mode to conserve power.Type: GrantFiled: June 29, 2007Date of Patent: January 27, 2009Assignee: Broadcom CorporationInventors: Srinivasa H. Garlapati, Paul Anthony Lettieri, Jason A. Trachewsky, Gregory H. Efland, Tom W. Kwan
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Patent number: 7184468Abstract: Provided is a system and method for a modem including one or more processing paths. Also included is a number of interconnected modules sequentially arrayed along the one or more paths. Each module is configured to (i) process signals passed along the paths in accordance with the sequence and (ii) implement predetermined functions to perform the processing. Further, each of the modules has a particular degree of functional programmability and the degrees of functional programmability monotonically vary in accordance with the sequence.Type: GrantFiled: January 24, 2003Date of Patent: February 27, 2007Assignee: Broadcom CorporationInventor: Gregory H. Efland
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Patent number: 7177988Abstract: Provided is a system and method for a modem including one or more processing paths. Also included is a number of interconnected modules sequentially arrayed along the one or more paths. Each module is configured to (i) process signals passed along the paths in accordance with the sequence and (ii) implement predetermined functions to perform the processing. Further, each of the modules has a particular degree of functional programmability and the degrees of functional programmability monotonically vary in accordance with the sequence.Type: GrantFiled: January 24, 2003Date of Patent: February 13, 2007Assignee: Broadcom CorporationInventors: Gregory H. Efland, Jeff Z. Guan, Gong-San Yu
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Patent number: 7146391Abstract: Provided is a system and method for a modem including one or more processing paths. Also included is a number of interconnected modules sequentially arrayed along the one or more paths. Each module is configured to (i) process signals passed along the paths in accordance with the sequence and (ii) implement predetermined functions to perform the processing. Further, each of the modules has a particular degree of functional programmability and the degrees of functional programmability monotonically vary in accordance with the sequence.Type: GrantFiled: January 24, 2003Date of Patent: December 5, 2006Assignee: Broadcom CorporationInventors: Gregory H. Efland, Haixiang Liang, Yuanjie Chen
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Patent number: 7142139Abstract: A digital-to-analog converter (DAC) disposed in a data transmission path to convert data from a digital format to an analog format to be transmitted is powered down during a receive mode of operation for a wireless communication device. Likewise, an analog-to-digital converter (ADC) disposed in a data reception path to convert received data from an analog format to a digital format is powered down during a transmit mode of operation.Type: GrantFiled: September 6, 2005Date of Patent: November 28, 2006Assignee: Broadcom CorporationInventors: Gregory H. Efland, Venkat Kodavati, Gouri Pidugu, Srinivasa H. Garlapati
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Patent number: 7116259Abstract: An analog-to-digital converter (ADC) disposed in a data reception path to convert data from an analog format to a digital format is switched between two or more power modes to conserve power when data is not being received. ADC stays in a lower power-lower precision mode until an inbound data is detected, at which time the ADC switches to a higher power-higher precision mode to convert the data. Once data conversion is completed, the ADC switches back to the lower power-lower precision mode to conserve power.Type: GrantFiled: May 18, 2004Date of Patent: October 3, 2006Assignee: Broadcom CorporationInventors: Srinivasa H. Garlapati, Paul Anthony Lettieri, Jason A. Trachewsky, Gregory H. Efland, Tom W. Kwan
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Patent number: 7079058Abstract: A digital-to-analog converter (DAC) disposed in a data transmission path to convert data from a digital format to an analog format to be transmitted is powered down during a receive mode of operation for a wireless communication device. Likewise, an analog-to-digital converter (ADC) disposed in a data reception path to convert received data from an analog format to a digital format is powered down during a transmit mode of operation.Type: GrantFiled: May 18, 2004Date of Patent: July 18, 2006Assignee: Broadcom CorporationInventors: Gregory H. Efland, Venkat Kodavati, Gouri Pidugu, Srinivasa H. Garlapati
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Patent number: 6721878Abstract: A method and processor configured to handle an exception may employ a “retry” signal, which may be associated with a memory access attempt by the processor. The retry signal determines if an exception is to be serviced during a period in which the memory access is delayed. In one embodiment for which the exception is an interrupt, the retry signal is asserted when memory access is delayed and the processor may proceed to service an interrupt request during this period of delayed memory access, regardless of the degree of completion of an instruction by the processor. During a period of delayed memory access, the processor may suspend instruction execution until the memory access becomes available. Upon completion of servicing the interrupt, the processor may resume instruction execution beginning with the last instruction attempted before the suspension of the instruction execution due to the delayed memory access.Type: GrantFiled: June 14, 2000Date of Patent: April 13, 2004Assignee: Cypress Semiconductor Corp.Inventors: Somnath Paul, Gregory H. Efland
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Patent number: 6704863Abstract: A method, system and processor are provided for minimizing latency and loss of processor bandwidth in a pipelined processor when responding to an interrupt. The method advantageously avoids emptying and refilling the processor's instruction pipeline in order to service an interrupt request. Instead, a short sequence of instructions comprising the interrupt response is inserted into the pipeline. Normal pipeline operation stalls while the inserted instructions execute, but since flow is not disrupted the loss in bandwidth is not as great as if the pipeline were flushed. Furthermore, direct insertion of the instructions into the pipeline avoids the need for the processor to save its context and branch to an interrupt service routine in memory; this results in much faster response in servicing the interrupt, thereby reducing latency.Type: GrantFiled: June 14, 2000Date of Patent: March 9, 2004Assignee: Cypress Semiconductor Corp.Inventors: Somnath Paul, Gregory H. Efland
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Publication number: 20040003185Abstract: Provided is a system and method for a modem including one or more processing paths. Also included is a number of interconnected modules sequentially arrayed along the one or more paths. Each module is configured to (i) process signals passed along the paths in accordance with the sequence and (ii) implement predetermined functions to perform the processing. Further, each of the modules has a particular degree of functional programmability and the degrees of functional programmability monotonically vary in accordance with the sequence.Type: ApplicationFiled: January 24, 2003Publication date: January 1, 2004Inventors: Gregory H. Efland, Jeff Z. Guan, Gong-San Yu
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Publication number: 20030225958Abstract: Provided is a system and method for a modem including one or more processing paths. Also included is a number of interconnected modules sequentially arrayed along the one or more paths. Each module is configured to (i) process signals passed along the paths in accordance with the sequence and (ii) implement predetermined functions to perform the processing. Further, each of the modules has a particular degree of functional programmability and the degrees of functional programmability monotonically vary in accordance with the sequence.Type: ApplicationFiled: January 24, 2003Publication date: December 4, 2003Inventors: Gregory H. Efland, Jeff Z. Guan, Lin Yin
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Publication number: 20030225808Abstract: Provided is a system and method for a modem including one or more processing paths. Also included is a number of interconnected modules sequentially arrayed along the one or more paths. Each module is configured to (i) process signals passed along the paths in accordance with the sequence and (ii) implement predetermined functions to perform the processing. Further, each of the modules has a particular degree of functional programmability and the degrees of functional programmability monotonically vary in accordance with the sequence.Type: ApplicationFiled: January 24, 2003Publication date: December 4, 2003Inventors: Gregory H. Efland, Haixiang Liang, Yuanjie Chen
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Publication number: 20030225807Abstract: Provided is a system and method for a modem including one or more processing paths. Also included is a number of interconnected modules sequentially arrayed along the one or more paths. Each module is configured to (i) process signals passed along the paths in accordance with the sequence and (ii) implement predetermined functions to perform the processing. Further, each of the modules has a particular degree of functional programmability and the degrees of functional programmability monotonically vary in accordance with the sequence.Type: ApplicationFiled: January 24, 2003Publication date: December 4, 2003Inventor: Gregory H. Efland
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Publication number: 20030210740Abstract: Provided is a system and method for a modem including one or more processing paths. Also included is a number of interconnected modules sequentially arrayed along the one or more paths. Each module is configured to (i) process signals passed along the paths in accordance with the sequence and (ii) implement predetermined functions to perform the processing. Further, each of the modules has a particular degree of functional programmability and the degrees of functional programmability monotonically vary in accordance with the sequence.Type: ApplicationFiled: January 24, 2003Publication date: November 13, 2003Inventors: Gregory H. Efland, Haixiang Liang, Kevin H. Peterson, Yuanjie Chen, Alan G. Corry, Nino P. Ferrario, Jeff Z. Guan, Meera Prahland, Ilya Stomakhin, Yongbing Wan, Larry C. Yamano, Lin Yin, Gong-San Yu, George A. Papanicolaou