Patents by Inventor Gregory Iovino

Gregory Iovino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Control Apparatus, Device, Method and Computer Program for Determining a Device-Specific Supply Voltage for a Semiconductor Device
    Publication number: 20220011795
    Abstract: Examples relate to control apparatus, a control device, a method and a computer program for determining a device-specific supply voltage for a semiconductor device, and to a corresponding semiconductor device and corresponding systems. The control apparatus is configured to obtain measurement data of measurement circuitry of the semiconductor device, the measurement data being related to a progress of aging of the semiconductor device. The control apparatus is configured to determine the device-specific supply voltage of the semiconductor device based on the measurement data. The control apparatus is configured to provide information on the device-specific supply voltage for a supply voltage control apparatus.
    Type: Application
    Filed: September 27, 2021
    Publication date: January 13, 2022
    Inventors: Michael RIFANI, Gregory IOVINO, Roman RECHTER, Grant MCFARLAND, Nasser A. KURD, Eric FETZER, Kurt HENINGER, Qinxin YU, Preethi RAMASWAMY, Monib AHMED, Pauline GOITIA, Narasimha LANKA, Mohammad RASHID, Kit Seong WONG
  • INTEGRATED CIRCUIT PACKAGE RECONFIGURATION MECHANISM
    Publication number: 20220004398
    Abstract: An apparatus is disclosed.
    Type: Application
    Filed: September 22, 2021
    Publication date: January 6, 2022
    Applicant: Intel Corporation
    Inventors: Gregory Iovino, Bharat Pillilli, Neel Piyush Shah, Philip Rogers, David Palmer
  • Dark bits to reduce physically unclonable function error rates
    Patent number: 9992031
    Abstract: Embodiments of an invention for using dark bits to reduce physically unclonable function (PUF) error rates are disclosed. In one embodiment, an integrated circuit includes a PUF cell array and dark bit logic. The PUF cell array is to provide a raw PUF value. The dark bit logic is to select PUF cells to mark as dark bits and to generate a dark bit mask based on repeated testing of the PUF cell array.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: June 5, 2018
    Assignee: Intel Corporation
    Inventors: Kevin Gotze, Gregory Iovino, David Johnston, Patrick Koeberl, Jiangtao Li, Wei Wu
  • DARK BITS TO REDUCE PHYSICALLY UNCLONABLE FUNCTION ERROR RATES
    Publication number: 20150092939
    Abstract: Embodiments of an invention for using dark bits to reduce physically unclonable function (PUF) error rates are disclosed. In one embodiment, an integrated circuit includes a PUF cell array and dark bit logic. The PUF cell array is to provide a raw PUF value. The dark bit logic is to select PUF cells to mark as dark bits and to generate a dark bit mask based on repeated testing of the PUF cell array.
    Type: Application
    Filed: September 27, 2013
    Publication date: April 2, 2015
    Inventors: Kevin Gotze, Gregory Iovino, David Johnston, Patrick Koeberl, Jiangtao Li, Wei Wu
  • On-die temperature control data for communicating to a thermal actuator
    Publication number: 20060052970
    Abstract: An on-die temperature control variable is provided to throttle a thermal actuator for cooling an integrated circuit. The integrated circuit includes a storage element to hold the temperature control variable. A temperature sensor is thermally coupled to the integrated circuit to sense an operating temperature of the integrated circuit. A thermal controller is communicatively coupled to the storage element and to the temperature sensor. The thermal controller throttles the thermal actuator when the temperature sensor indicates that the operating temperature of the integrated circuit is below the temperature control variable.
    Type: Application
    Filed: August 23, 2004
    Publication date: March 9, 2006
    Inventors: Tawfik Arabi, Hung-Piao Ma, Benson Inkley, Gregory Iovino, Stephen Gunther, Matthew Reilly
  • Arrangements having IC voltage and thermal resistance designated on a per IC basis
    Publication number: 20050247605
    Abstract: Arrangements having integrated circuit (IC) voltage and thermal resistance designated on a per IC basis.
    Type: Application
    Filed: July 14, 2005
    Publication date: November 10, 2005
    Inventors: Tawfik Arabi, Hung-Piao Ma, Gregory Iovino, Shai Rotem, Avner Kornfeld, Gregory Taylor