Abstract: A clock circuit apparatus includes a resonator configured to output an uncompensated clock signal and a temperature sensor assembly operably coupled to the resonator. The temperature sensor assembly may be configured to measure temperature and provide temperature measurements. The clock circuit apparatus may also include compensation circuitry configured to receive the uncompensated clock signal, receive the temperature measurements and generate temperature data based on the temperature measurements, apply a frequency predicting neural network to the temperature data to determine a frequency correction, apply the uncompensated clock signal and the frequency correction to a synthesizer to generate a stabilized clock output signal, and output the stabilized clock output signal.

Abstract: A time transfer modem includes a radio frequency integrated circuit (RFIC), a radio frequency (RF) front end, and processing circuitry. The RF front end is configured to receive and up-convert an input for time transfer with a remote station to generate an up-converted timing signal centered at a select frequency that is outside of a frequency range of interest but within an operational frequency range of the RFIC. The RF front end may also be configured to attenuate, via a pre-selection filter, up-converted adjacent signals to generate a filtered timing signal at the select frequency. The RFIC may be configured to down-convert and digitize the filtered timing signal to generate a digitized timing signal for signal processing by the processing circuitry to determine a clock difference between a local clock signal and the digitized timing signal that originated from the remote station.

Abstract: A time transfer modem includes a radio frequency integrated circuit (RFIC), a radio frequency (RF) front end, and processing circuitry. The RF front end is configured to receive and up-convert an input for time transfer with a remote station to generate an up-converted timing signal centered at a select frequency that is outside of a frequency range of interest but within an operational frequency range of the RFIC. The RF front end may also be configured to attenuate, via a pre-selection filter, up-converted adjacent signals to generate a filtered timing signal at the select frequency. The RFIC may be configured to down-convert and digitize the filtered timing signal to generate a digitized timing signal for signal processing by the processing circuitry to determine a clock difference between a local clock signal and the digitized timing signal that originated from the remote station.