Abstract: A method for reducing the parasitic capacitance and capacitive coupling of nodes (106) in a dielectrically isolated integrated circuit (100) using layout changes. A separate area of floating silicon (110) is created adjacent two or more dielectrically isolated nodes (106). The two or more nodes (106) are chosen that "slew together" (i.e., nodes that are required to change by the same voltage at the same time). The area of floating silicon (110) is created by placing an additional trench (112) around both of the dielectrically isolated nodes (106).

Abstract: A DC-to-DC switching power supply (12) receives a DC biased power signal at a first input (14), a control signal at its control input (16) and produces an output DC voltage at its output terminal (20). A power supply controller (30) compares the produced output signal V.sub.out with an input reference signal V.sub.ref. The reference signal is an analog signal which may be produced via digital-to-analog converter (34) which converts a digital input command into a corresponding analog signal V.sub.ref. The resulting error signal is then passed through a proportional gain block 36 and an integral gain block (38). A signal proportional to the differential of the output voltage is passed through a differential gain block (44). The outputs from the proportional gain block (36) integrator gain block (38) differential gain block (44) are summed in the second summer (40) and applied as the input to a delta-sigma converter (42).