Patents by Inventor Gregory Michael Stitt

Gregory Michael Stitt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9495139
    Abstract: Elastic computing is an optimization framework that combines standard application code with specialized elastic functions and corresponding optimization tools. The elastic functions provide a knowledge-base of implementation alternatives and parallelization strategies for a given function. When an application calls an elastic function, the elastic computing tools analyze available devices and resources (e.g., cores, GPUs, FPGAs, etc.) and current run-time parameters, and then transparently select from numerous pre-analyzed implementation possibilities to optimize for performance, power, energy, size, or any combination of these goals.
    Type: Grant
    Filed: April 11, 2012
    Date of Patent: November 15, 2016
    Assignee: UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INC.
    Inventors: Gregory Michael Stitt, John Robert Wernsing
  • Publication number: 20140026111
    Abstract: Elastic computing is an optimization framework that combines standard application code with specialized elastic functions and corresponding optimization tools. The elastic functions provide a knowledge-base of implementation alternatives and parallelization strategies for a given function. When an application calls an elastic function, the elastic computing tools analyze available devices and resources (e.g., cores, GPUs, FPGAs, etc.) and current run-time parameters, and then transparently select from numerous pre-analyzed implementation possibilities to optimize for performance, power, energy, size, or any combination of these goals.
    Type: Application
    Filed: April 11, 2012
    Publication date: January 23, 2014
    Inventors: Gregory Michael Stitt, John Robert Wernsing
  • Patent number: 7356672
    Abstract: A warp processor includes a microprocessor, profiler, dynamic partitioning module, and warp configurable logic architecture. The warp processor initially executes a binary for an application entirely on the microprocessor, the profiler monitors the execution of the binary to detect its critical code regions, and the dynamic partitioning module partitions the binary into critical and non-critical code regions, re-implements the critical code regions in the configurable logic, and then transforms the binary so that it accesses the configurable logic rather than execute the critical code regions.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: April 8, 2008
    Assignee: The Regents of the University of California
    Inventors: Frank Vahid, Roman Lev Lysecky, Gregory Michael Stitt