Abstract: A method and apparatus for determining a voltage, such as a bias voltage, supplied by an integrated circuit. A nominal terminating resistor is connected across a first and a second input/output pads from which the voltage is supplied. The voltage is measured across third and fourth pads connected, respectively, to the first and second pads. In an alternative embodiment the functionality of the third and the fourth pads is multiplexed between chip operational circuitry unrelated to the voltage to be measured and a connection to the first and second pads for measuring the voltage.

Abstract: A printed wiring board provides connection between a chip and a standard footprint layout of a test machine. An insulating substrate defines a chip receiving region having a plurality of chip connector pads on one side of the substrate for connection to bump contacts of custom integrated circuit chips. A plurality of layout connectors are in a layout connection region of the board and arranged in the standard footprint layout. Circuit traces provide electrical connection between the chip connectors and the layout connectors, and a solder stop on the substrate extends over the circuit traces between the chip receiving region and the layout connection region. A plurality of plated apertures extend through the substrate in the chip receiving region to a thermally conductive heat sink opposite the chip connectors. In use, a chip is mounted to the board in the chip receiving region and connected to the chip connectors to rigidly mount the chip to the board.

Abstract: A printed wiring board provides connection between a chip and a standard footprint layout of a test machine. An insulating substrate defines a chip receiving region having a plurality of chip connector pads on one side of the substrate for connection to bump contacts of custom integrated circuit chips. A plurality of layout connectors are in a layout connection region of the board and arranged in the standard footprint layout. Circuit traces provide electrical connection between the chip connectors and the layout connectors, and a solder stop on the substrate extends over the circuit traces between the chip receiving region and the layout connection region. A plurality of plated apertures extend through the substrate in the chip receiving region to a thermally conductive heat sink opposite the chip connectors. In use, a chip is mounted to the board in the chip receiving region and connected to the chip connectors to rigidly mount the chip to the board.