Patents by Inventor Gregory P. Schaadt

Gregory P. Schaadt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11904164
    Abstract: Described herein are apparatuses (e.g., systems and devices) and methods of delivering nanosecond pulsed electrical fields (nsPEF). In particular, these apparatuses and methods may provide enhanced safety and robust operation over even very short (e.g., nanosecond and sub-nanosecond pulses) and high voltage pulsing; these benefits may be accomplished by multi-functional isolation of various subsystems and components of the apparatus, even including the low-voltage, control and command portions of the apparatus with extremely low capacitance, high voltage isolation.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: February 20, 2024
    Assignee: Pulse Biosciences, Inc.
    Inventors: Kenneth R. Krieg, Gregory P. Schaadt, Chaofeng Huang
  • Publication number: 20230381514
    Abstract: Described herein are apparatuses and methods for applying high voltage, sub-microsecond (e.g., nanosecond range) pulsed output to a biological material, e.g., tissues, cells, etc., using a high voltage (e.g., MOSFET) gate driver circuit having a high voltage isolation and a low inductance. In particular, described herein are multi-core pulse transformers comprising independent transformer cores arranged in parallel on opposite sides of a substrate. The transformer cores may have coaxial primary and secondary windings. Also describe are pulse generators including multi-core pulse transformers arranged in parallel (e.g., on opposite sides of a PCB) to reduce MOSFET driver gate inductance.
    Type: Application
    Filed: August 7, 2023
    Publication date: November 30, 2023
    Inventors: Chaofeng HUANG, Gregory P. SCHAADT, Kenneth R. KRIEG
  • Patent number: 11766563
    Abstract: Described herein are apparatuses and methods for applying high voltage, sub-microsecond (e.g., nanosecond range) pulsed output to a biological material, e.g., tissues, cells, etc., using a high voltage (e.g., MOSFET) gate driver circuit having a high voltage isolation and a low inductance. In particular, described herein are multi-core pulse transformers comprising independent transformer cores arranged in parallel on opposite sides of a substrate. The transformer cores may have coaxial primary and secondary windings. Also describe are pulse generators including multi-core pulse transformers arranged in parallel (e.g., on opposite sides of a PCB) to reduce MOSFET driver gate inductance.
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: September 26, 2023
    Assignee: Pulse Biosciences, Inc.
    Inventors: Chaofeng Huang, Gregory P. Schaadt, Kenneth R. Krieg
  • Publication number: 20220370801
    Abstract: Described herein are apparatuses and methods for applying high voltage, sub-microsecond (e.g., nanosecond range) pulsed output to a biological material, e.g., tissues, cells, etc., using a high voltage (e.g., MOSFET) gate driver circuit having a high voltage isolation and a low inductance. In particular, described herein are multi-core pulse transformers comprising independent transformer cores arranged in parallel on opposite sides of a substrate. The transformer cores may have coaxial primary and secondary windings. Also describe are pulse generators including multi-core pulse transformers arranged in parallel (e.g., on opposite sides of a PCB) to reduce MOSFET driver gate inductance.
    Type: Application
    Filed: August 4, 2022
    Publication date: November 24, 2022
    Inventors: Chaofeng HUANG, Gregory P. SCHAADT, Kenneth R. KRIEG
  • Publication number: 20220313990
    Abstract: Described herein are apparatuses and methods for applying high voltage, high current, sub-microsecond (e.g., nanosecond range) pulsed output to a biological material, e.g., tissues, cells, etc., while preventing damage from load arcing. Some of the apparatuses and methods described herein may limit the load and pulsed power source current in case of load arcing significantly by using a transmission line (e.g., coaxial cable, twisted pair or parallel pair cables) between the pulsed power source and the load having a length configured to achieve this goal.
    Type: Application
    Filed: September 29, 2020
    Publication date: October 6, 2022
    Inventors: Chaofeng HUANG, Gregory P. SCHAADT, Kenneth R. KRIEG
  • Patent number: 11452870
    Abstract: Described herein are apparatuses and methods for applying high voltage, sub-microsecond (e.g., nanosecond range) pulsed output to a biological material, e.g., tissues, cells, etc., using a high voltage (e.g., MOSFET) gate driver circuit having a high voltage isolation and a low inductance. In particular, described herein are multi-core pulse transformers comprising independent transformer cores arranged in parallel on opposite sides of a substrate. The transformer cores may have coaxial primary and secondary windings. Also describe are pulse generators including multi-core pulse transformers arranged in parallel (e.g., on opposite sides of a PCB) to reduce MOSFET driver gate inductance.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: September 27, 2022
    Assignee: Pulse Biosciences, Inc.
    Inventors: Chaofeng Huang, Gregory P. Schaadt, Kenneth R. Krieg
  • Publication number: 20220023631
    Abstract: Described herein are apparatuses (e.g., systems and devices) and methods of delivering nanosecond pulsed electrical fields (nsPEF). In particular, these apparatuses and methods may provide enhanced safety and robust operation over even very short (e.g., nanosecond and sub-nanosecond pulses) and high voltage pulsing; these benefits may be accomplished by multi-functional isolation of various subsystems and components of the apparatus, even including the low-voltage, control and command portions of the apparatus with extremely low capacitance, high voltage isolation.
    Type: Application
    Filed: July 27, 2020
    Publication date: January 27, 2022
    Inventors: Kenneth R. KRIEG, Gregory P. SCHAADT, Chaofeng HUANG
  • Publication number: 20210187292
    Abstract: Described herein are apparatuses and methods for applying high voltage, sub-microsecond (e.g., nanosecond range) pulsed output to a biological material, e.g., tissues, cells, etc., using a high voltage (e.g., MOSFET) gate driver circuit having a high voltage isolation and a low inductance. In particular, described herein are multi-core pulse transformers comprising independent transformer cores arranged in parallel on opposite sides of a substrate. The transformer cores may have coaxial primary and secondary windings. Also describe are pulse generators including multi-core pulse transformers arranged in parallel (e.g., on opposite sides of a PCB) to reduce MOSFET driver gate inductance.
    Type: Application
    Filed: December 18, 2019
    Publication date: June 24, 2021
    Inventors: Chaofeng HUANG, Gregory P. SCHAADT, Kenneth R. KRIEG
  • Patent number: 7655553
    Abstract: A method of packing electronic devices and an apparatus thereof are disclosed herein. The method allows for usage of solder materials with a melting temperature of 180° C. or higher, such as from 210° C. to 300° C., and from 230° C. to 260° C., so as to provide reliable and robust packaging. This method is particularly useful for packaging electronic devices that are sensitive to temperatures, such as microstructures, which can be microelectromechanical devices (MEMS), such as micromirror array devices.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: February 2, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Gregory P. Schaadt
  • Patent number: 7645704
    Abstract: The present invention provides a method for removing sacrificial materials in fabrications of microstructures using a selected spontaneous vapor phase chemical etchants. During the etching process, an amount of the etchant is fed into an etch chamber for removing the sacrificial material. Additional amount of the etchant are fed into the etch chamber according to a detection of an amount or an amount of an etching product so as to maintaining a substantially constant etching rate of the sacrificial materials inside the etch chamber. Accordingly, an etching system is provided for removing the sacrificial materials based on the disclosed etching method.
    Type: Grant
    Filed: September 17, 2003
    Date of Patent: January 12, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Hongqin Shi, Gregory P. Schaadt
  • Patent number: 7189332
    Abstract: Processes for the removal of a layer or region from a workpiece material by contact with a process gas in the manufacture of a microstructure are enhanced by the ability to accurately determine the endpoint of the removal step. A vapor phase etchant is used to remove a material that has been deposited on a substrate, with or without other deposited structure thereon. By creating an impedance at the exit of an etching chamber (or downstream thereof), as the vapor phase etchant passes from the etching chamber, a gaseous product of the etching reaction is monitored, and the endpoint of the removal process can be determined. The vapor phase etching process can be flow through, a combination of flow through and pulse, or recirculated back to the etching chamber.
    Type: Grant
    Filed: October 11, 2002
    Date of Patent: March 13, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Satyadev R. Patel, Gregory P. Schaadt, Douglas B. MacDonald, Niles K. MacDonald, Hongqin Shi
  • Patent number: 7041224
    Abstract: The etching of a material in a vapor phase etchant is disclosed where a vapor phase etchant is provided to an etching chamber at a total gas pressure of 10 Torr or more, preferably 20 Torr or even 200 Torr or more. The vapor phase etchant can be gaseous acid etchant, a noble gas halide or an interhalogen. The sample/workpiece that is etched can be, for example, a semiconductor device or MEMS device, etc. The material that is etched/removed by the vapor phase etchant is preferably silicon and the vapor phase etchant is preferably provided along with one or more diluents. Another feature of the etching system includes the ability to accurately determine the end point of the etch step, such as by creating an impedance at the exit of the etching chamber (or downstream thereof) so that when the vapor phase etchant passes from the etching chamber, a gaseous product of the etching reaction is monitored, and the end point of the removal process can be determined.
    Type: Grant
    Filed: March 22, 2002
    Date of Patent: May 9, 2006
    Assignee: Reflectivity, Inc.
    Inventors: Satyadev R. Patel, Gregory P. Schaadt, Douglas B. MacDonald, Hongqin Shi, Andrew G. Huibers, Peter Heureux
  • Patent number: 7027200
    Abstract: The present invention discloses a method and apparatus for removing the sacrificial materials in fabrications of microstructures using a vapor phase etchant recipe having a spontaneous vapor phase chemical etchant. The vapor phase etchant recipe has a mean-free-path corresponding to the minimum thickness of the sacrificial layers between the structural layers of the microstructure. This method is of particular importance in removing the sacrificial layers underneath the structural layers of the microstructure.
    Type: Grant
    Filed: September 17, 2003
    Date of Patent: April 11, 2006
    Assignee: Reflectivity, INC
    Inventors: Hongqin Shi, Gregory P. Schaadt, Andrew G. Huibers, Satyadev R. Patel
  • Patent number: 6949202
    Abstract: Processes for the addition or removal of a layer or region from a workpiece material by contact with a process gas in the manufacture of a microstructure are enhanced by the use of recirculation of the process gas. Recirculation is effected by a pump that has no sliding or abrading parts that contact the process gas, nor any wet (such as oil) seals or purge gas in the pump. Improved processing can be achieved by a process chamber that contains a baffle, a perforated plate, or both, appropriately situated in the chamber to deflect the incoming process gas and distribute it over the workpiece surface. In certain embodiments, a diluent gas is added to the recirculation loop and continuously circulated therein, followed by the bleeding of the process gas (such as an etchant gas) into the recirculation loop. Also, cooling of the process gas, etching chamber and/or sample platen can aid the etching process. The method is particularly useful for adding to or removing material from a sample of microscopic dimensions.
    Type: Grant
    Filed: August 28, 2000
    Date of Patent: September 27, 2005
    Assignee: Reflectivity, INC
    Inventors: Satyadev R. Patel, Gregory P. Schaadt, Douglas B. MacDonald, Niles K. MacDonald
  • Patent number: 6942811
    Abstract: The etching of a sacrificial silicon portion in a microstructure such as a microelectromechanical structure by the use of etchant gases that are noble gas fluorides or halogen fluorides is performed with greater selectivity toward the silicon portion relative to other portions of the microstructure by slowing the etch rate. The etch rate is preferably 30 um/hr or less, and can be 3 um/hr or even less. The selectivity is also improved by the addition of non-etchant gaseous additives to the etchant gas. Preferably the non-etchant gaseous additives that have a molar-averaged formula weight that is below that of molecular nitrogen offer significant advantages over gaseous additives of higher formula weights by causing completion of the etch in a shorter period of time while still achieving the same improvement in selectivity. The etch process is also enhanced by the ability to accurately determine the end point of the removal step.
    Type: Grant
    Filed: September 17, 2001
    Date of Patent: September 13, 2005
    Assignee: Reflectivity, Inc
    Inventors: Satyadev R. Patel, Gregory P. Schaadt, Douglas B. MacDonald, Hongqin Shi
  • Patent number: 6939472
    Abstract: The present invention teaches a method and apparatus for removing sacrificial materials in fabrications of microstructures using one or more selected spontaneous vapor phase etchants. The selected etchant is fed into an etch chamber containing the microstructure during each feeding cycle of a sequence of feeding cycles until the sacrificial material of the microstructure is exhausted through the chemical reaction between the etchant and the sacrificial material. Specifically, during a first feeding cycle, a first amount of selected spontaneous vapor phase etchant is fed into the etch chamber. At a second feeding cycle, a second amount of the etchant is fed into the etch chamber. The first amount and the second amount of the selected etchant may or may not be the same. The time duration of the feeding cycles are individually adjustable.
    Type: Grant
    Filed: September 17, 2003
    Date of Patent: September 6, 2005
    Assignee: Reflectivity, Inc.
    Inventors: Gregory P. Schaadt, Hongqin Shi
  • Patent number: 6800210
    Abstract: An etching method, such as for forming a micromechanical device, is disclosed. One embodiment of the method is for releasing a micromechanical structure, comprising, providing a substrate; providing a sacrificial layer directly or indirectly on the substrate; providing one or more micromechanical structural layers on the sacrificial layer; performing a first etch to remove a portion of the sacrificial layer, the first etch comprising providing an etchant gas and energizing the etchant gas so as to allow the etchant gas to physically, or chemically and physically, remove the portion of the sacrificial layer; performing a second etch to remove additional sacrificial material in the sacrificial layer, the second etch comprising providing a gas that chemically but not physically etches the additional sacrificial material.
    Type: Grant
    Filed: May 22, 2002
    Date of Patent: October 5, 2004
    Assignee: Reflectivity, Inc.
    Inventors: Satyadev R. Patel, Andrew G. Huibers, Gregory P. Schaadt, Peter J. Heureux
  • Publication number: 20040069747
    Abstract: Processes for the removal of a layer or region from a workpiece material by contact with a process gas in the manufacture of a microstructure are enhanced by the ability to accurately determine the endpoint of the removal step. A vapor phase etchant is used to remove a material that has been deposited on a substrate, with or without other deposited structure thereon. By creating an impedance at the exit of an etching chamber (or downstream thereof), as the vapor phase etchant passes from the etching chamber, a gaseous product of the etching reaction is monitored, and the endpoint of the removal process can be determined.
    Type: Application
    Filed: October 11, 2002
    Publication date: April 15, 2004
    Applicant: REFLECTIVITY, INC., a California corporation
    Inventors: Satyadev R. Patel, Gregory P. Schaadt, Douglas B. MacDonald, Niles K. MacDonald, Hongqin Shi
  • Publication number: 20020197761
    Abstract: An etching method, such as for forming a micromechanical device, is disclosed. One embodiment of the method is for releasing a micromechanical structure, comprising, providing a substrate; providing a sacrificial layer directly or indirectly on the substrate; providing one or more micromechanical structural layers on the sacrificial layer; performing a first etch to remove a portion of the sacrificial layer, the first etch comprising providing an etchant gas and energizing the etchant gas so as to allow the etchant gas to physically, or chemically and physically, remove the portion of the sacrificial layer; performing a second etch to remove additional sacrificial material in the sacrificial layer, the second etch comprising providing a gas that chemically but not physically etches the additional sacrificial material.
    Type: Application
    Filed: May 22, 2002
    Publication date: December 26, 2002
    Applicant: REFLECTIVITY, INC.
    Inventors: Satyadev R. Patel, Andrew G. Huibers, Gregory P. Schaadt, Peter J. Heureux
  • Publication number: 20020195423
    Abstract: The etching of a material in a vapor phase etchant is disclosed where a vapor phase etchant is provided to an etching chamber at a total gas pressure of 10 Torr or more, preferably 20 Torr or even 200 Torr or more. The vapor phase etchant can be gaseous acid etchant, a noble gas halide or an interhalogen. The sample/workpiece that is etched can be, for example, a semiconductor device or MEMS device, etc. The material that is etched/removed by the vapor phase etchant is preferably silicon and the vapor phase etchant is preferably provided along with one or more diluents. Another feature of the etching system includes the ability to accurately determine the end point of the etch step, such as by creating an impedance at the exit of the etching chamber (or downstream thereof) so that when the vapor phase etchant passes from the etching chamber, a gaseous product of the etching reaction is monitored, and the end point of the removal process can be determined.
    Type: Application
    Filed: March 22, 2002
    Publication date: December 26, 2002
    Applicant: REFLECTIVITY, INC.
    Inventors: Satyadev R. Patel, Gregory P. Schaadt, Douglas B. MacDonald, Hongqin Shi, Andrew G. Huibers, Peter Heureux