Abstract: A power-on-reset (POR) circuit having a zero or substantially zero current state while the supply voltage is in a predetermined, valid range is disclosed. The POR circuit includes a state machine, an oscillator, and output circuitry that are electrically coupled to one another and to a supply voltage. Output from the output circuitry is also provided to the integrated circuit to which the POR circuit is coupled. The state machine includes a plurality of sequential circuits such as latches, flip-flops, and the like that are electrically coupled in a cascade, to provide a ripple counter. The output circuitry is structured and arranged to reset or initialize all of the logic elements on the chip by generating a POR output logic HI (1) signal by Boolean operation of the logic circuitry signal of the state machine for all Boolean states except one. The oscillator is disabled when the POR output logic signal is LO (0), which causes the POR circuit to enter a zero or substantially zero current state.

Abstract: A power-on-reset (POR) circuit having a zero or substantially zero current state while the supply voltage is in a predetermined, valid range is disclosed. The POR circuit includes a state machine, an oscillator, and output circuitry that are electrically coupled to one another and to a supply voltage. Output from the output circuitry is also provided to the integrated circuit to which the POR circuit is coupled. The state machine includes a plurality of sequential circuits such as latches, flip-flops, and the like that are electrically coupled in a cascade, to provide a ripple counter. The output circuitry is structured and arranged to reset or initialize all of the logic elements on the chip by generating a POR output logic HI (1) signal by Boolean operation of the logic circuitry signal of the state machine for all Boolean states except one. The oscillator is disabled when the POR output logic signal is LO (0), which causes the POR circuit to enter a zero or substantially zero current state.

Abstract: A thermal accelerometer device that provides a compensation for sensitivity variations over temperature. The thermal accelerometer includes signal conditioning circuitry operative to receive analog signals representing a differential temperature is indicative of a sensed acceleration. The signal conditioning circuitry includes serially connected A-to-D and D-to-A converters, which implement a temperature dependent function and process the received signals to provide a compensation for sensitivity variations over a range of ambient temperature. To provide a ratiometric compensation for variations in power supply voltage, a buffered voltage proportional to the supply voltage is provided as a reference voltage to the D-to-A converter. The thermal accelerometer includes a self-test circuit for verifying the integrity of a heater, temperature sensors, and circuitry included within the device.

Abstract: A digital temperature compensated crystal oscillator (10) with pin multiplex control which includes: four analog I/O pins, a signal multiplex method which allows switchable digital communication via at least two of the analog I/O pins (20,28), and an external mode selector (12) which operates through the power leads. Changes in the power voltage level selects the TCXO (10) to operate in a normal or communication operating mode. In the normal operating mode the TCXO operates in a normal analog manner. In the communication mode, the analog functions of the I/O pins (20,28) are switched out and digital functions are allowed on the same I/O pins (20,28). The use of the same I/O pins (20,28) for switchable analog and digital signals saves size and cost, and prevents the inadvertent access to the digital functions of the TCXO (10) by customers in the field.

Abstract: A temperature compensated crystal oscillator (TCXO) (10) with a disable feature adapted to disable or enable temperature compensation. The TCXO (10) includes a crystal oscillator (12), a temperature measurement and compensation circuit (18), a timing generator (20) and a temperature compensation disable/enable circuit (30) for disabling or enabling temperature compensation updates of the crystal oscillator (12). The TCXO (10) is particularly adapted for use in connection with digital temperature compensated crystal oscillators.