Patents by Inventor Gregory S. Lovelace

Gregory S. Lovelace has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7110353
    Abstract: A distributed digital cross-connect system (10) is provided. The system includes two or more network interface islands (12) that connect to the telecommunications network. The system (10) also includes one or more distributed services nodes (18). Each distributed services node (18) connects to two or more of the network interface islands (12). The network interface islands (12) can transmit data to each other through the distributed services node (18). An administration system (14) is also connected to each distributed services node (18) and each network interface island (12). The administration system (14) transmits matrix configuration and telecommunications channel routing data to the network interface islands (12) and the distributed services nodes (18).
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: September 19, 2006
    Assignee: Alcatel USA Sourcing, L.P.
    Inventors: Stephen A. Deschaine, Mark C. Cromwell, Gregory S. Lovelace, Becky J. Sampson, Michael H. Jette, Dennis K. Smith, William A. Moffit, Steven D. Sensel, Edgar L. Read, Amanda G. Noe
  • Patent number: 6285687
    Abstract: A timing system for distributing a timing signal includes a master timing system that receives a network timing reference. The master timing system generates a master timing signal from the network timing reference. A distributed services node timing system receives the master timing signal and embeds a timing signal into a data transmission frame. A network interface island receives the data transmission frame and retrieves the embedded timing signal therefrom.
    Type: Grant
    Filed: August 12, 1999
    Date of Patent: September 4, 2001
    Assignee: Alcatel USA Sourcing, L.P.
    Inventors: Gregory S. Lovelace, Michael H. Jette, Steven D. Sensel, Edgar L. Read, Amanda G. Noe
  • Patent number: 6198720
    Abstract: A distributed digital cross-connect system (10) is provided. The system includes two or more network interface islands (12) that connect to the telecommunications network. The system (10) also includes one or more distributed services nodes (18). Each distributed services node (18) connects to two or more of the network interface islands (12). The network interface islands (12) can transmit data to each other through the distributed services node (18). An administration system (14) is also connected to each distributed services node (18) and each network interface island (12). The administration system (14) transmits matrix configuration and telecommunications channel routing data to the network interface islands (12) and the distributed services nodes (18).
    Type: Grant
    Filed: December 26, 1996
    Date of Patent: March 6, 2001
    Assignee: Alcatel USA Sourcing, L.P.
    Inventors: Stephen A. Deschaine, Mark C. Cromwell, Gregory S. Lovelace, Becky J. Sampson, Michael H. Jette, Dennis K. Smith, William A. Moffit, Steven D. Sensel, Edgar L. Read, Amanda G. Noe
  • Patent number: 5930311
    Abstract: A circuitry (10) is provided for automatically retiming a received synchronous data signal to a local clock. The circuitry (10) includes a first flip-flop (20) operable to register at least one synchronous data signal in response to a receive clock signal and to generate at least one data output signal. An OR gate (26) receives a data latch enable signal and a local clock signal. The local clock signal is frequency coherent with the receive clock signal. The OR gate (26) produces an enable signal. A latch (28) is coupled to the OR gate (26) for receiving the enable signal and in cascading arrangement with the first flip-flop (20). The latch (28) latches the data output signal on the falling edge of the local clock signal when the data latch enable signal is low. The latch (28) holds the latched data output signal as long as the local clock signal and the data latch enable signal are low. When either the local clock signal or the data latch enable signal is high, the latch (28) passes the data output signal.
    Type: Grant
    Filed: October 10, 1996
    Date of Patent: July 27, 1999
    Assignee: Alcatel USA Sourcing, L.P.
    Inventors: Gregory S. Lovelace, Amanda G. Noe, David M. Smith
  • Patent number: 5901136
    Abstract: A timing system (100) for coordinating the components of a distributed digital cross-connect system (10) is provided. The timing system (100) includes a master timing system (102) that receives a network timing reference (98, 99) and generates a master timing signal. A distributed services node timing system (104, 106) is connected to the master timing system (102) and receives the master timing signal. The distributed services node timing system (104, 106) then embeds a timing signal in a data transmission frame (150). Two or more digital cross-connect timing systems (108) are connected to the distributed services node timing system (104, 106) and receive the data transmission frame (150). The digital cross-connect timing systems (108) retrieve the embedded timing signal from the data transmission frame (150).
    Type: Grant
    Filed: December 26, 1996
    Date of Patent: May 4, 1999
    Assignee: Alcatel USA Sourcing, L.P.
    Inventors: Gregory S. Lovelace, Michael H. Jette, Steven D. Sensel, Edgar L. Read, Amanda G. Noe