Patents by Inventor Gregory Sadowski

Gregory Sadowski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Encoding valid data states in source synchronous bus interfaces using clock signal transitions
    Patent number: 9639488
    Abstract: Embodiments are described for a method of reducing power consumption in source synchronous bus systems by reducing signal transitions in the system. Instead of sending clock and data valid signals, only the start and end of valid data packets are marked by clock signal transitions, or only a number of clock pulses that corresponds to number of data words is sent, or only a number transitions on clock signals are sent. The clock signal transitions may comprise either clock pulses or exclusively rising edge or falling edge transitions of the clock signal.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: May 2, 2017
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Gregory Sadowski, Sudha Thiruvengadam, Arun Iyer
  • SOURCE SYNCHRONOUS BUS CLOCK GATING SYSTEM
    Publication number: 20150372802
    Abstract: Embodiments are described for a method of reducing power consumption in source synchronous bus systems by reducing signal transitions in the system. Instead of sending clock and data valid signals, only the start and end of valid data packets are marked by clock signal transitions, or only a number of clock pulses that corresponds to number of data words is sent, or only a number transitions on clock signals are sent. The clock signal transitions may comprise either clock pulses or exclusively rising edge or falling edge transitions of the clock signal.
    Type: Application
    Filed: June 20, 2014
    Publication date: December 24, 2015
    Inventors: Gregory Sadowski, Sudha Thiruvengadam, Arun Iyer