Patents by Inventor Gregory Scott Mathews

Gregory Scott Mathews has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6658559
    Abstract: A computer product, method, and apparatus for causing a computer to perform load operations in a particular way are disclosed. The computer is made to replace a load instruction at a particular location in a computer program instruction sequence with two instructions, an advanced load instruction and a load check instruction. The advanced load instruction is inserted into the instruction sequence up-stream from where the original load instruction was located, and may be inserted above store instructions. The load check instruction is inserted into the instruction sequence after the store instructions. An Advanced Load Address Table (ALAT) structure, containing physical address data and validity data for each non-speculative advanced load, is updated with data about each advanced load and each store instruction executed, and queried on execution of each load check instruction about whether or not a particular advanced load is safe to use.
    Type: Grant
    Filed: December 31, 1999
    Date of Patent: December 2, 2003
    Assignee: Intel Corporation
    Inventors: Judge Ken Arora, Gregory Scott Mathews, Ghassan W. Khadder, Sreenivas A. Reddy
  • Patent number: 6233652
    Abstract: The invention provides for a content addressable memory (CAM). The CAM includes an input port and a plurality of locations to store page addresses for comparing to an address received from the input port. Each location includes a plurality of lower cells and at least one page size mask cell to send signals to an associated one of the lower cells. The associated one of the lower cells produces a match signal in response to either the page size cell sending a mask signal or to the portion page address stored therein matching a corresponding portion of the address received from the input port. Each location produces a match signal in response to each cell therein producing a match signal. The invention provides for a method of translating logical to physical addresses.
    Type: Grant
    Filed: October 30, 1998
    Date of Patent: May 15, 2001
    Assignee: Intel Corporation
    Inventors: Gregory Scott Mathews, Jarvis Leung
  • Patent number: 6223263
    Abstract: A method and apparatus for managing a memory region that stores locked and unlocked data. Data stored in the memory region is accessed. The data has an associated index that is stored in a locked index queue. While the index is stored in the locked index queue, the data is locked.
    Type: Grant
    Filed: September 9, 1998
    Date of Patent: April 24, 2001
    Assignee: Intel Corporation
    Inventors: Gregory Scott Mathews, Selina Sze Wan Yuen
  • Patent number: 6134636
    Abstract: A method and apparatus for storing, locking, and unlocking data in a memory array. The memory array includes a first line to store a first type of data while the first line is unlocked during a first period of time and to store a second type of data while the first line is locked during a subsequent second period of time. The memory array further includes a second line to store the second type of data while the second line is locked during the first period of time and to store the first type of data while the second line is unlocked during the second period of time.
    Type: Grant
    Filed: September 11, 1998
    Date of Patent: October 17, 2000
    Assignee: Intel Corporation
    Inventors: Gregory Scott Mathews, John Wai Cheong Fu, Dean Ahmad Mulla