Patents by Inventor Gregory Steinke

Gregory Steinke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250272463
    Abstract: To mitigate voltage droop while reducing the power and space consumed on the board and reducing switching activity, a clock skipping scheme may be implemented for an FPGA. The clock skipping scheme may be implemented in the FPGA design via an Electronic Design Automation (EDA) tool. The EDA tool may define clock skipping cycles based on customer needs for current ramp up speed (e.g., for an inrush current or an operating current) and clock frequency. The EDA tool may adjust clock skipping based on a power target and/or usage conditions of a user software design. In addition to mitigating voltage droop and reducing space consumed on the board and power consumed by the FPGA, the clock skipping scheme may maintain a base clock frequency, enable timing closure at the base clock frequency, and alleviate the need to reclose timing during clock skipping operations.
    Type: Application
    Filed: March 27, 2025
    Publication date: August 28, 2025
    Inventors: Guang Chen, Archanna Srinivasan, Yi Peng, Gregory Steinke
  • Publication number: 20240213985
    Abstract: A circuit system includes an interposer comprising conductors and switch circuits coupled to the conductors, a first integrated circuit die coupled to the interposer, and a second integrated circuit die coupled to the interposer. The first integrated circuit die comprises a primary controller circuit for configuring the switch circuits. The second integrated circuit die comprises a secondary controller circuit. The primary controller circuit configures configurable logic circuits in the second integrated circuit die by providing configuration bits to the secondary controller circuit through the interposer.
    Type: Application
    Filed: March 11, 2024
    Publication date: June 27, 2024
    Applicant: Altera Corporation
    Inventors: Arch Zaliznyak, Archanna Srinivasan, Gregory Steinke
  • Publication number: 20220337248
    Abstract: Systems, methods, and devices are provided for configurable die-to-die communication between dies of an integrated circuit system using a programmable routing bridge. Such an integrated circuit system may include a first die on a substrate, a second die on the substrate, and a programmable routing bridge embedded in the substrate. The programmable routing bridge may be mounted to the first die and the second die and is configurable to transfer data between selectable points of the first die and selectable points of the second die.
    Type: Application
    Filed: July 1, 2022
    Publication date: October 20, 2022
    Inventors: J-Wing Teh, Min Suet Lim, Lai Guan Tang, MD Altaf Hossain, Gregory Steinke
  • Patent number: 11281195
    Abstract: An integrated circuit may include an embedded test processor that is capable of performing in-field testing and repair of hardware-related defects without having to remove the integrated circuit from the customer's board. The test processor can be used to drive and monitor test vectors to performing defect screening on input-output circuitry, logic circuitry including lookup table (LUT) circuits and digital signal processing (DSP) circuits, transceiver circuitry, and configuration random-access memory circuitry. The test processor can generate a failure mechanism report and selectively fix repairable defects via a hardware redundancy scheme. The failure mechanism report allows the customer to identify the root cause of failure in the overall system.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: March 22, 2022
    Assignee: Intel Corporation
    Inventors: Kenneth T. Daxer, Gregory Steinke, Adam J. Wright, Kalyana Ravindra Kantipudi
  • Patent number: 10867090
    Abstract: A method for designing a system on a target device is disclosed. The system is synthesized from a register transfer level description. The system is placed on the target device. The system is routed on the target device. A configuration file is generated that reflects the synthesizing, placing, and routing of the system for programming the target device. A modification for the system is identified. The configuration file is modified to effectuate the modification for the system without changing the placing and routing of the system.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: December 15, 2020
    Assignee: Intel Corporation
    Inventors: Gregg William Baeckler, Martin Langhammer, Sergey Gribok, Scott J. Weber, Gregory Steinke
  • Patent number: 10864833
    Abstract: A vehicle seat carpet backer assembly includes a carpet piece and resin/fiber material joined and molded to form a resin/fiber backer panel of a defined shape. A flexible toe-kick portion is provided a seamless transition between the upper carpet portion of the resin/fiber, upper carpet, panel portion and the lower carpet portion of the flexible toe-kick portion. A method includes providing a carpet piece cut to a size and shape and a sized resin/fiber panel material. The resin/fiber panel material is heated and placed with a top section of the carpet in a molding press to fuse them together. A shaped assembly is then formed with flanges which are inserted in channels of a seat. A polypropylene reinforcement sheet is attached to a lower section of the carpet that was not subjected to the molding press. Elastic bands are sewn to the lower edge of the backer assembly.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: December 15, 2020
    Assignee: Adient Engineering and IP GmbH
    Inventors: Liviu Rus, Dorel Baciu, Gregory Steinke, Matt Romak
  • Publication number: 20190248257
    Abstract: A vehicle seat carpet backer assembly includes a carpet piece and resin/fiber material joined and molded to form a resin/fiber backer panel of a defined shape. A flexible toe-kick portion is provided a seamless transition between the upper carpet portion of the resin/fiber, upper carpet, panel portion and the lower carpet portion of the flexible toe-kick portion. A method includes providing a carpet piece cut to a size and shape and a sized resin/fiber panel material. The resin/fiber panel material is heated and placed with a top section of the carpet in a molding press to fuse them together. A shaped assembly is then formed with flanges which are inserted in channels of a seat. A polypropylene reinforcement sheet is attached to a lower section of the carpet that was not subjected to the molding press. Elastic bands are sewn to the lower edge of the backer assembly.
    Type: Application
    Filed: January 31, 2019
    Publication date: August 15, 2019
    Inventors: Liviu RUS, Dorel BACIU, Gregory STEINKE, Matt ROMAK
  • Publication number: 20190213289
    Abstract: A method for designing a system on a target device is disclosed. The system is synthesized from a register transfer level description. The system is placed on the target device. The system is routed on the target device. A configuration file is generated that reflects the synthesizing, placing, and routing of the system for programming the target device. A modification for the system is identified. The configuration file is modified to effectuate the modification for the system without changing the placing and routing of the system.
    Type: Application
    Filed: March 18, 2019
    Publication date: July 11, 2019
    Inventors: Gregg William BAECKLER, Martin LANGHAMMER, Sergey GRIBOK, Scott J. WEBER, Gregory STEINKE
  • Publication number: 20190101906
    Abstract: An integrated circuit may include an embedded test processor that is capable of performing in-field testing and repair of hardware-related defects without having to remove the integrated circuit from the customer's board. The test processor can be used to drive and monitor test vectors to performing defect screening on input-output circuitry, logic circuitry including lookup table (LUT) circuits and digital signal processing (DSP) circuits, transceiver circuitry, and configuration random-access memory circuitry. The test processor can generate a failure mechanism report and selectively fix repairable defects via a hardware redundancy scheme. The failure mechanism report allows the customer to identify the root cause of failure in the overall system.
    Type: Application
    Filed: September 29, 2017
    Publication date: April 4, 2019
    Applicant: Intel Corporation
    Inventors: Kenneth T. Daxer, Gregory Steinke, Adam J. Wright, Kalyana Ravindra Kantipudi
  • Patent number: 6238002
    Abstract: A seat back assembly for a vehicle including a seat back, a pivot device having a pivot axis, and an armrest. The seat back is connected to the pivot device for rotational movement relative to the seat cushion between an upright position and a folded position. The armrest is connected to the pivot device for rotational movement relative to the seat back between a deployed position and retracted position. Both the seat back and the armrest pivot about a common pivot axis. The seat back assembly (1) impedes the rotational movement of the armrest beyond the retracted position; (2) holds the armrest in the retracted position when the seat back is in the fold position; and (3) urges the arm rest from the deployed position to the retracted position during rotational movement of the seat back from the upright position to the folded position.
    Type: Grant
    Filed: October 8, 1999
    Date of Patent: May 29, 2001
    Assignee: Johnson Controls Technology Company
    Inventors: William S. Brewer, Mark A. Pattok, Gregory Steinke, Glenn Scott