Abstract: A circuit comprises a vector separator circuit to generate a first extracted signal according to (i) a first correlation signal, (ii) a second correlation signal, and (iii) a relative response signal. The first correlation signal corresponds to a first correlation between an input signal and a first test signal. The first test signal has a first frequency, and the input signal includes a first spur having the first frequency. The second correlation signal corresponds to a second correlation between the input signal and a second test signal. The second test signal has a second frequency. The relative response signal corresponds to a relative response of the second frequency in the first correlation signal.

Abstract: A circuit comprises a vector separator circuit to generate a first extracted signal according to (i) a first correlation signal, (ii) a second correlation signal, and (iii) a relative response signal. The first correlation signal corresponds to a first correlation between an input signal and a first test signal. The first test signal has a first frequency, and the input signal includes a first spur having the first frequency. The second correlation signal corresponds to a second correlation between the input signal and a second test signal. The second test signal has a second frequency. The relative response signal corresponds to a relative response of the second frequency in the first correlation signal.

Abstract: New devices and methods capable of detecting a true Root-Mean-Square (RMS) power level of an analog input signal are disclosed. For example, an electronic circuit can include a squaring circuit that receives the analog input signal and processes the analog input signal so as to produce a squared-output of the analog input signal using an analog transfer function of the squaring circuit, and a square-root circuit that receives the squared-output and processes the squared-output using an analog transfer function of the square-root circuit so as to produce an analog RMS output signal representing the true RMS power level of the analog input signal.

Abstract: Aspects of the disclosure provide a differential amplifier. The differential amplifier includes a first pair of complementary transistors, a second pair of complementary transistors, and a current source. First control terminals of the first pair of complementary transistors are coupled to a first input node of the differential amplifier and first driving terminals of the first pair of complementary transistors are coupled to a first output node of the differential amplifier for driving a load. Second control terminals of the second pair of complementary transistors are coupled to a second input node of the differential amplifier and second driving terminals of the second pair of complementary transistors coupled to a second output node of the differential amplifier for driving the load. The current source is configured to maintain a substantially constant total current flow through the first pair of complementary transistors and the second pair of complementary transistors.

Abstract: New devices and methods capable of detecting a true Root-Mean-Square (RMS) power level of an analog input signal are disclosed. For example, an electronic circuit can include a squaring circuit that receives the analog input signal and processes the analog input signal so as to produce a squared-output of the analog input signal using an analog transfer function of the squaring circuit, and a square-root circuit that receives the squared-output and processes the squared-output using an analog transfer function of the square-root circuit so as to produce an analog RMS output signal representing the true RMS power level of the analog input signal.

Abstract: An amplifier integrated circuit (IC) including a push-pull amplifier having a push stage and a pull stage. A first loop of wire configured to form a first degeneration inductance of the push stage. A second loop of wire configured to form a first degeneration inductance of the pull stage. The first loop and the second loop are concentric. The first loop is connected to a reference potential. The second loop is connected to a supply voltage.

Abstract: The delay locked loop circuit includes a charge pump circuit that may charge and discharge in response to an assertion of an up signal and a down signal, respectively. The delay locked loop circuit also includes a detection circuit that may assert the up signal indicating an occurrence of a transition of a first clock signal and may assert the down signal indicating an occurrence of a transition of a second clock signal. The delay locked loop circuit further includes a delay circuit that may provide a plurality of delayed clock signals and an additional delayed clock signal, each corresponding to a delayed version of the first clock signal. Further, a false lock circuit may provide a reset signal to the detection circuit dependent upon whether a predetermined number of successive clock edges associated with the delayed clock signals occur within a given clock cycle of the first clock signal.

Abstract: Components of a radio-frequency (RF) apparatus including transceiver circuitry and frequency modification circuitry of a crystal oscillator circuit that generates a reference signal with adjustable frequency may be partitioned in a variety of ways, for example, as one or more separate integrated circuits. The frequency modification circuitry may be implemented as part of a crystal oscillator circuit that includes digitally controlled crystal oscillator (“DCXO”) circuitry and a crystal. The frequency modification circuitry may include at least one variable capacitance device and may be employed to generate a reference signal with adjustable frequency. The adjustable reference signal may be provided to other components of the RF apparatus and/or the RF apparatus may be configured to provide the adjustable reference signal to baseband processor circuitry.

Abstract: Components of a radio-frequency (RF) apparatus including transceiver circuitry and frequency modification circuitry of a crystal oscillator circuit that generates a reference signal with adjustable frequency may be partitioned in a variety of ways, for example, as one or more separate integrated circuits. The frequency modification circuitry may be implemented as part of a crystal oscillator circuit that includes digitally controlled crystal oscillator (“DCXO”) circuitry and a crystal. The frequency modification circuitry may include at least one variable capacitance device and may be employed to generate a reference signal with adjustable frequency. The adjustable reference signal may be provided to other components of the RF apparatus and/or the RF apparatus may be configured to provide the adjustable reference signal to baseband processor circuitry.

Abstract: Components of a radio-frequency (RF) apparatus including transceiver circuitry and frequency modification circuitry of a crystal oscillator circuit that generates a reference signal with adjustable frequency may be partitioned in a variety of ways, for example, as one or more separate integrated circuits. The frequency modification circuitry may be implemented as part of a crystal oscillator circuit that includes digitally controlled crystal oscillator (“DCXO”) circuitry and a crystal. The frequency modification circuitry may include at least one variable capacitance device and may be employed to generate a reference signal with adjustable frequency. The adjustable reference signal may be provided to other components of the RF apparatus and/or the RF apparatus may be configured to provide the adjustable reference signal to baseband processor circuitry.

Abstract: An ADSL central office transmission system for transmitting downstream DMT signals to a plurality of remote ADSL transceiver is disclosed. The system includes a DMT digital signal transceiver that generates a time division multiplexed digital signal that includes a plurality of DMT signals to be sent on a plurality of ADSL lines. A digital to analog converter converts the time division multiplexed digital signal into a time division multiplexed analog signal that includes a plurality of analog DMT signals. The analog to digital converter has an output that outputs the time division multiplexed analog signal. A switch selectively connects the output of the digital to analog converter to each of a plurality of transmitters. The transmitters are configured to drive the plurality of ADSL lines. Thus, the plurality ADSL lines are driven by the plurality of analog DMT signals.

Abstract: The present invention is a correlator for use in spread spectrum applications which utilizing continuous-time analog domain signal processing. The correlator include a multiplier which is coupled to an integration capacitance, and an integration reset circuit which is coupled to the integration capacitance. The correlator is designed to receive a first input signal and a second input signal. The multiplier multiplies the first input signal and the second input signal to produce a multiplier output current. The multiplier output current is then integrated by the integration capacitance which produces a correlator output voltage. The integration reset circuit then reset the integration capacitance to a reset voltage.

Abstract: A system and method for compensating for a voltage offset between an inverting input and a noninverting input of an op amp to provide a stable bandgap reference. The method including measuring the voltage offset between the inverting input and the noninverting input of the op amp and searching for a compensating current input to the op amp that compensates for the voltage offset. A programmable current source is set to output the compensating current to the op amp.