Patents by Inventor Greja Johanna Verheijden

Greja Johanna Verheijden has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070035816
    Abstract: A method to produce air gaps between metal lines (8(i)( and within dielectrics. The method consists of obtaining a dual damascene structure, applying a diffusion barrier layer (10) directly on the planarized surface and performing a lithography step, thus shielding the metal lines underneath the diffusion barrier layer. Optionally, some portions of large dielectric areas (6) between the metal lines (8(i)) are also shielded. The exposed diffusion barrier layer portions and underlying dielectric are etched. A layer of a material that can be decomposed in volatile components by heating to a temperature of typically between 150-450° C. is applied and planarized by etching or CMP. A dielectric layer (20) that is permeable to the decomposition products is deposited and subsequently the substrate is heated. Then, the disposable layer decomposes and disappears through the permeable dielectric layer, leaving air gaps (22) behind in between the metal lines (8(i)) and the large dielectric areas.
    Type: Application
    Filed: May 17, 2004
    Publication date: February 15, 2007
    Inventors: Roel Daamen, Greja Johanna Verheijden
  • Publication number: 20050221600
    Abstract: A method of manufacturing a semiconductor device having damascene structures with air gaps is provided. In one embodiment, the method comprises providing a substantially planar layer having a first metal layer, depositing a via level dielectric layer, patterning the via level dielectric layer, at least partly etching the via level dielectric layer, depositing a disposable layer on the at least partly etched via level dielectric layer, patterning the disposable layer, depositing a second metal layer, planarizing second metal layer, depositing permeable dielectric layer after planarizing the second metal layer, and removing the disposable layer through the permeable dielectric layer to form air gaps.
    Type: Application
    Filed: March 17, 2005
    Publication date: October 6, 2005
    Inventors: Roel Daamen, Greja Johanna Verheijden
  • Publication number: 20050214690
    Abstract: A method of manufacturing a semiconductor device with precision patterning is disclosed. A structure of a small dimension is created in a material, such as a semiconductor material, using a first and a second pattern, the patterns being identical but displaced over a distance with respect to each other. Two mask layers are used, wherein the first pattern is etched into the upper mask layer with a selective etch, and the second pattern is created on the upper mask layer or on the lower mask layer at locations where the upper mask layer has been removed. A part of the lower mask layer and/or the upper mask layer is etched according to the second pattern, resulting in a mask formed by remaining parts of the lower and upper mask layers, the mask having a structure with a dimension determined by a displacement of the second pattern with respect to the first pattern.
    Type: Application
    Filed: March 15, 2005
    Publication date: September 29, 2005
    Inventors: Greja Johanna Verheijden, Pascal Bancken, Johannes Wingerden