Patents by Inventor Gretchen M. Adema

Gretchen M. Adema has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5923796
    Abstract: A multichip module having high density optical and electrical interconnections between integrated circuit chips includes a substrate overlaying an array of integrated circuit chips. An optical transmitter generates a first optical beam through the substrate and an optical detector receives a second optical beam through the substrate. A hologram is positioned in the path of at least one of the first and second optical beams. An array of electrical contact pads is located on the substrate corresponding to the array of electrical contact pads on the respective integrated circuit chips. A pattern of electrical interconnection lines is located on the substrate for electrically interconnecting the integrated circuit chips. A solder bump between electrical contact pads on the substrate and on the integrated circuit chips establish electrical connections between the substrate and the integrated circuit chips, and also facilitate alignment of the integrated circuit chips with respect to the substrate.
    Type: Grant
    Filed: April 17, 1997
    Date of Patent: July 13, 1999
    Assignees: MCNC, The University of North Carolina
    Inventors: Michael R. Feldman, Iwona Turlik, Gretchen M. Adema
  • Patent number: 5638469
    Abstract: A multichip module having high density optical and electrical interconnections between integrated circuit chips includes a substrate overlaying an array of integrated circuit chips. An optical transmitter generates a first optical beam through the substrate and an optical detector receives a second optical beam through the substrate. A hologram is positioned in the path of at least one of the first and second optical beams. An array of electrical contact pads is located on the substrate corresponding to the array of electrical contact pads on the respective integrated circuit chips. A pattern of electrical interconnection lines is located on the substrate for electrically interconnecting the integrated circuit chips. A solder bump between electrical contact pads on the substrate and on the integrated circuit chips establish electrical connections between the substrate and the integrated circuit chips, and also facilitate alignment of the integrated circuit chips with respect to the substrate.
    Type: Grant
    Filed: August 16, 1993
    Date of Patent: June 10, 1997
    Assignees: MCNC, University of North Carolina
    Inventors: Michael R. Feldman, Iwona Turlik, Gretchen M. Adema
  • Patent number: 5237434
    Abstract: A multichip module having high density optical and electrical interconnections between integrated circuit chips. An optically transparent substrate is positioned overlying an array of integrated circuit chips mounted on a mounting substrate. The mounting substrate may include a heat sink to remove excess heat from the integrated circuit chips. The multichip module includes integrated circuit chips having optical detectors and optical transmitters to establish optical interconnections therebetween. A hologram is positioned in the optical path between the optical transmitters and the optical detectors. A planar mirror is preferably positioned opposite the hologram to direct the optical beams. The optically transparent substrate also includes an array of electrical contact pads to establish electrical connections with corresponding electrical contact pads on the underlying integrated circuit chips.
    Type: Grant
    Filed: November 5, 1991
    Date of Patent: August 17, 1993
    Assignee: MCNC
    Inventors: Michael R. Feldman, Iwona Turlik, Gretchen M. Adema
  • Patent number: 4897287
    Abstract: A simple method for forming a metallization for an integrated circuit comprises depositing on a silicon substrate a first layer of refractory metal and nitrogen solid mixture and depositing thereon a second layer of refractory metal. The resulting structure is heated to convert the first layer to refractory metal nitride and the second layer to refractory metal silicide by flow of silicon from the substrate. By appropriate masking of the substrate, formation of silicide in the second layer can be blocked, thus permitting formation of self-aligned metallization by selective etching.
    Type: Grant
    Filed: October 6, 1988
    Date of Patent: January 30, 1990
    Assignee: The BOC Group, Inc.
    Inventors: Henry R. Berger, Gretchen M. Adema