Patents by Inventor Gretchen Maerker Adema

Gretchen Maerker Adema has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Solder bump fabrication methods and structures including a titanium barrier layer
    Patent number: 6222279
    Abstract: A method for fabricating solder bumps on a microelectronic device having contact pads includes the steps of depositing a titanium barrier layer on the device, forming an under bump metallurgy layer on the titanium barrier layer, and forming one or more solder bumps on the under bump metallurgy layer. The solder bump or bumps define exposed portions of the under bump metallurgy layer which are removed, and then the exposed portion of the titanium barrier layer is removed. The titanium barrier layer protects the underlying microelectronic device from the etchants used to remove the under bump metallurgy layer. The titanium layer also prevents the under bump metallurgy layer from forming a residue on the underlying microelectronic device. Accordingly, the titanium barrier layer allows the under bump metallurgy layer to be quickly removed without leaving residual matter thereby reducing the possibility of electrical shorts between solder bumps.
    Type: Grant
    Filed: April 20, 1998
    Date of Patent: April 24, 2001
    Assignee: MCNC
    Inventors: Joseph Daniel Mis, Gretchen Maerker Adema, Mark D. Kellam, W. Boyd Rogers
  • Solder bump fabrication methods and structure including a titanium barrier layer
    Patent number: 5767010
    Abstract: A method for fabricating solder bumps on a microelectronic device having contact pads includes the steps of depositing a titanium barrier layer on the device, forming an under bump metallurgy layer on the titanium barrier layer, and forming one or more solder bumps on the under bump metallurgy layer. The solder bump or bumps define exposed portions of the under bump metallurgy layer which are removed, and then the exposed portion of the titanium barrier layer is removed. The titanium barrier layer protects the underlying microelectronic device from the etchants used to remove the under bump metallurgy layer. The titanium layer also prevents the under bump metallurgy layer from forming a residue on the underlying microelectronic device. Accordingly, the titanium barrier layer allows the under bump metallurgy layer to be quickly removed without leaving residual matter thereby reducing the possibility of electrical shorts between solder bumps.
    Type: Grant
    Filed: November 5, 1996
    Date of Patent: June 16, 1998
    Assignee: MCNC
    Inventors: Joseph Daniel Mis, Gretchen Maerker Adema, Mark D. Kellam, W. Boyd Rogers