Patents by Inventor Grzegorz Kozlowski

Grzegorz Kozlowski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190371882
    Abstract: The disclosure relates to a semiconductor device, including a semiconductor substrate of a first conductivity type and a semiconductor layer of a second conductivity type on the semiconductor substrate, the second conductivity type being different than the first conductivity type. The semiconductor device also includes an isolation structure electrically isolating a first region of the semiconductor layer from a second region of the semiconductor layer. A shallow trench isolation structure vertically extends from a surface of the semiconductor layer into the first region of the semiconductor layer. An electrical resistor is formed on the shallow trench isolation structure.
    Type: Application
    Filed: May 28, 2019
    Publication date: December 5, 2019
    Inventors: Andreas Meiser, Grzegorz Kozlowski, Till Schloesser
  • Publication number: 20190189743
    Abstract: The disclosure relates to a planar field effect transistor. The planar field effect transistor includes a drain extension region between a channel region and a drain terminal at a first surface of a semiconductor body. The planar field effect transistor also includes a first electrode part and a second electrode part laterally spaced apart from the first electrode part. The first electrode part is arranged as a gate electrode above the channel region. The second electrode part is arranged above the drain extension region and is electrically isolated from the first electrode part.
    Type: Application
    Filed: December 14, 2018
    Publication date: June 20, 2019
    Inventors: Andreas Meiser, Grzegorz Kozlowski
  • Patent number: 9985416
    Abstract: A semiconductor light emitter device, comprising a substrate, an active layer made of Germanium, which is configured to emit light under application of an operating voltage to the semiconductor light emitter device, wherein a gap is arranged on the substrate, which extends between two bridgeposts laterally spaced from each other, the active layer is arranged on the bridgeposts and bridges the gap, and wherein the semiconductor light emitter device comprises a stressor layer, which induces a tensile strain in the active layer above the gap.
    Type: Grant
    Filed: February 11, 2013
    Date of Patent: May 29, 2018
    Assignee: IHP GMBH—INNOVATIONS FOR HIGH PERFORMANCE MICROELECTRONICS—INSTITUT FUR INNOVATIVE MIKROELEKTRONIK
    Inventors: Giovanni Capellini, Christian Wenger, Thomas Schroder, Grzegorz Kozlowski
  • Publication number: 20150063382
    Abstract: A semiconductor light emitter device, comprising a substrate, an active layer made of Germanium, which is configured to emit light under application of an operating voltage to the semiconductor light emitter device, wherein a gap is arranged on the substrate, which extends between two bridgeposts laterally spaced from each other, the active layer is arranged on the bridgeposts and bridges the gap, and wherein the semiconductor light emitter device comprises a stressor layer, which induces a tensile strain in the active layer above the gap.
    Type: Application
    Filed: February 11, 2013
    Publication date: March 5, 2015
    Inventors: Giovanni Capellini, Christian Wenger, Thomas Schroder, Grzegorz Kozlowski