Abstract: Disclosed herein is a high thermal emissive semiconductor device package which comprises a substrate having a plurality of external connection leads, a plurality of connection lands and wires between the leads and the lands; at least one semiconductor chips mounted on the substrate; bonding wires electrically connecting bonding pads of the chip and the connection lands of the substrate; a heat spreader with high thermal conductivity, which is attached to the upper surface of the bonding pads of the chip by insulating adhesives with good thermal conductivity; and a metal cap which is in contact with the upper surface of the heat spreader via thermal compounds and encapsulates the whole components by being sealed to the substrate.The high thermal emissive semiconductor device packages have advantageous that they efficiently emit heat generated during the operation of components and that they may be applied to various semiconductor devices which can be produced at low costs.

Abstract: A process for manufacturing a thin profile semiconductor package by means of TAB (tape automated bonding). A barrier metal layer is formed on bonding pads formed on portions of a chip covered with insulating layers. A photoresist layer is formed on the resultant structure, and patterned so as to expose the barrier metal layer, and then bumps are formed on the barrier metal layer as high as the photoresist layer. The semiconductor package is completed by bonding the bumps and inner lead portions of the TAB tape. The photoresist remains on the completed package as a permanent protective layer.

Abstract: A semiconductor memory module is formed of semiconductor packages respectively having at least one defect data line combined to be mounted to a module substrate which has two rows of auxiliary pads for excluding the defect data line of the mounted semiconductor packages from overall data lines of the module to thus attain more than a required memory capacity. By connecting the auxiliary pads with coupling units of resistors or jumper cables to isolate the defect data lines, the semiconductor memory module achieves the required memory capacity and utilizes defective semiconductor packages to reduce manufacturing costs, to attain excellent compatibility resulting from employing all kinds of semiconductor packages, and to simplify the data line connection process. Further, reworking semiconductor package is easy which improves yield, and humid air is prevented from permeating into the interior of the molding resin thereby preventing failures such as disconnection of wires and improving reliability.

Abstract: The present invention relates to a semiconductor package which is loaded with a plurality of high-performance integrated circuits for high-performance systems such as super computers and large-sized computers. According to the invention, the packaging density of the semiconductor is doubled by stacking upper and lower members and forming substrates loaded with a plurality of chips in a multistep structure so that the size of computers can be minimized and heat emission efficiency can be improved by forming heat sinks in a fin-pin shape.

Abstract: A semiconductor chip bonding process is disclosed, and the process comprises the steps of forming a first Au ball using a wire ball bump bonding apparatus, stacking a second Au ball on the first Au ball, stacking a Pb ball on the second Au ball using the wire ball bump bonding apparatus, and bonding the chip to a substrate, wherein the conventional complicated BUMP manufacturing process is omitted due to the CHIP BONDING technique during the assembling process, so that the formation process is shortened and the defect rate during the chip bonding is minimized, thereby the manufacturing cost can be saved.

Abstract: The present invention relates to a semiconductor package which is loaded with a plurality of high-performance integrated circuits for high-performance systems such as super computers and large-sized computers. According to the invention, the packaging density of the semiconductor is doubled by stacking upper and lower members and forming substrates loaded with a plurality of chips in a multistep structure so that the size of computers can be minimized and heat emission efficiency can be improved by forming heat sinks in a fin-pin shape.