Abstract: A method for making a metal oxide semiconductor carbon nanotube thin film transistor circuit. A p-type carbon nanotube thin film transistor and a n-type carbon nanotube thin film transistor are formed on an insulating substrate and stacked with each other. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.

Abstract: A method for making a metal oxide semiconductor carbon nanotube thin film transistor circuit. A p-type carbon nanotube thin film transistor and a n-type carbon nanotube thin film transistor are formed on an insulating substrate and stacked with each other. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.

Abstract: A metal oxide semiconductor carbon nanotube thin film transistor circuit includes a p-type carbon nanotube thin film transistor and an n-type carbon nanotube thin film transistor stacked on one another. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.

Abstract: A method for making a metal oxide semiconductor carbon nanotube thin film transistor circuit. A p-type carbon nanotube thin film transistor and a n-type carbon nanotube thin film transistor are formed on an insulating substrate and stacked with each other. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.

Abstract: A metal oxide semiconductor carbon nanotube thin film transistor circuit includes a p-type carbon nanotube thin film transistor and an n-type carbon nanotube thin film transistor stacked on one another. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.

Abstract: A metal oxide semiconductor carbon nanotube thin film transistor circuit includes a p-type carbon nanotube thin film transistor and a n-type carbon nanotube thin film transistor stacked with each other. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.

Abstract: A method of making N-type semiconductor layer includes following steps. An insulating substrate is provided. An MgO layer is deposited on the insulating substrate. A first dielectric layer is formed by acidizing the MgO layer. A semiconductor carbon nanotube layer is formed to cover the MgO layer. A source electrode and drain electrode are formed to be electrically connected to the semiconductor carbon nanotube layer. A second dielectric layer is applied on the semiconductor carbon nanotube layer. A gate electrode is formed on the second dielectric layer.

Abstract: A method for making a metal oxide semiconductor carbon nanotube thin film transistor circuit. A p-type carbon nanotube thin film transistor and a n-type carbon nanotube thin film transistor are formed on an insulating substrate and stacked with each other. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.

Abstract: A metal oxide semiconductor carbon nanotube thin film transistor circuit includes a p-type carbon nanotube thin film transistor and a n-type carbon nanotube thin film transistor stacked with each other. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.

Abstract: An N-type thin film transistor includes an insulating substrate, a first MgO layer, a semiconductor carbon nanotube layer, a second MgO layer, a functional dielectric layer, a gate electrode, a source electrode and a drain electrode. The first MgO layer is located on the insulating substrate. The semiconductor carbon nanotube layer is located on the first MgO layer. The source electrode and the drain electrode are electrically connected to the semiconductor carbon nanotube layer, wherein the source electrode and the drain electrode are spaced from each other, and a channel is defined in the semiconductor carbon nanotube layer and between the source electrode and the drain electrode. The second MgO layer is located on the semiconductor carbon nanotube layer. The functional dielectric layer covering the second MgO layer. The gate electrode on the functional dielectric layer.

Abstract: A method of making N-type semiconductor layer includes following steps. An insulating substrate is provided. A semiconductor carbon nanotube layer is formed on the insulating substrate. An MgO layer is deposited on the semiconductor carbon nanotube layer. A functional dielectric layer is located on the MgO layer. A source electrode and drain electrode are formed to electrically connect the semiconductor carbon nanotube layer. A gate electrode is formed on the functional dielectric layer.

Abstract: An N-type thin film transistor includes an insulating substrate, a gate electrode, an insulating layer, a first MgO layer, a semiconductor carbon nanotube layer, a second MgO layer, a functional dielectric layer, a source electrode and a drain electrode. The gate electrode is located on a surface of the insulating substrate. The insulating layer is located on the gate electrode. The first MgO layer is located on the insulating layer. The semiconductor carbon nanotube layer is located on the first MgO layer. The source electrode and the drain electrode are electrically connected to the semiconductor carbon nanotube layer, wherein the source electrode and the drain electrode are spaced from each other. The second MgO layer is located on the semiconductor carbon nanotube layer. The functional dielectric layer is located on the second MgO layer.

Abstract: A light emitting diode includes an insulating substrate, a first MgO layer, a semiconductor carbon nanotube layer, a second MgO layer, a functional dielectric layer, a first electrode, and a second electrode. The semiconductor carbon nanotube layer has a first surface and a second surface. The first MgO layer coats entire the first surface. The second surface is divided into a first region and a second region. The first region is coated with the second MgO layer. The second MgO layer is covered by the functional dielectric layer. The second region is exposed. The first electrode is electrically connected to the first region. The second electrode is electrically connected to the second region.

Abstract: An N-type thin film transistor includes an insulating substrate, a first MgO layer, a semiconductor carbon nanotube layer, a second MgO layer, a functional dielectric layer, a gate electrode, a source electrode and a drain electrode. The first MgO layer is located on the insulating substrate. The semiconductor carbon nanotube layer is located on the first MgO layer. The source electrode and the drain electrode are electrically connected to the semiconductor carbon nanotube layer, wherein the source electrode and the drain electrode are spaced from each other, and a channel is defined in the semiconductor carbon nanotube layer and between the source electrode and the drain electrode. The second MgO layer is located on the semiconductor carbon nanotube layer. The functional dielectric layer covering the second MgO layer. The gate electrode on the functional dielectric layer.

Abstract: An N-type thin film transistor includes an insulating substrate, a gate electrode, an insulating layer, a first MgO layer, a semiconductor carbon nanotube layer, a second MgO layer, a functional dielectric layer, a source electrode and a drain electrode. The gate electrode is located on a surface of the insulating substrate. The insulating layer is located on the gate electrode. The first MgO layer is located on the insulating layer. The semiconductor carbon nanotube layer is located on the first MgO layer. The source electrode and the drain electrode are electrically connected to the semiconductor carbon nanotube layer, wherein the source electrode and the drain electrode are spaced from each other. The second MgO layer is located on the semiconductor carbon nanotube layer. The functional dielectric layer is located on the second MgO layer.

Abstract: An thin film transistor includes an insulating substrate, an MgO layer, a semiconductor carbon nanotube layer, a functional dielectric layer, a source electrode, a drain electrode, and a gate electrode. The semiconductor carbon nanotube layer is sandwiched between the MgO layer and the functional dielectric layer. The source electrode and the drain electrode electrically connect the semiconductor carbon nanotube layer. The gate electrode is sandwiched between the insulating substrate and the MgO layer.

Abstract: An N-type thin film transistor includes an insulating substrate, a semiconductor carbon nanotube layer, an MgO layer, a functional dielectric layer, a source electrode, a drain electrode, and a gate electrode. The semiconductor carbon nanotube layer is located on the insulating substrate. The source electrode and the drain electrode electrically connect the semiconductor carbon nanotube layer, wherein the source electrode and the drain electrode are spaced from each other, and a channel is defined in the semiconductor carbon nanotube layer between the source electrode and the drain electrode. The MgO layer is located on the semiconductor carbon nanotube layer. The functional dielectric layer covers the MgO layer. The gate electrode is located on the functional dielectric layer.

Abstract: A light emitting diode includes an insulating substrate, a first MgO layer, a semiconductor carbon nanotube layer, a second MgO layer, a functional dielectric layer, a first electrode, and a second electrode. The semiconductor carbon nanotube layer has a first surface and a second surface. The first MgO layer coats entire the first surface. The second surface is divided into a first region and a second region. The first region is coated with the second MgO layer. The second MgO layer is covered by the functional dielectric layer. The second region is exposed. The first electrode is electrically connected to the first region. The second electrode is electrically connected to the second region.

Abstract: An N-type thin film transistor includes an insulating substrate, a gate electrode, an insulating layer, a semiconductor carbon nanotube layer, an MgO layer, a functional dielectric layer, a source electrode, and a drain electrode. The gate electrode is located on a surface of the insulating substrate. The insulating layer is located on the gate electrode. The semiconductor carbon nanotube layer is located on the insulating layer. The source electrode and the drain electrode electrically connect the semiconductor carbon nanotube layer, wherein the source electrode and the drain electrode are spaced from each other, and a channel is defined in the semiconductor carbon nanotube layer between the source electrode and the drain electrode. The MgO layer is located on the semiconductor carbon nanotube layer. The functional dielectric layer covers the MgO layer.

Abstract: An light emitting diode includes an insulating substrate, a P-type semiconductor layer, a semiconductor carbon nanotube layer, an MgO layer, a functional dielectric layer, and a first electrode, and a second electrode. The P-type semiconductor layer is located on the insulating substrate. The semiconductor carbon nanotube layer is located on the P-type semiconductor layer. The MgO layer is located on the semiconductor carbon nanotube layer. The functional dielectric layer covers the MgO layer. The first electrode is electrically connected to the P-type semiconductor layer. The second electrode is electrically connected to the semiconductor carbon nanotube layer.