Patents by Inventor Guan-Hua Chen
Guan-Hua Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12154939Abstract: The present disclosure, in some embodiments, relates to a metal-insulator-metal (MIM) capacitor structure. The MIM capacitor structure includes one or more lower interconnects disposed within a lower dielectric structure over a substrate. A first dielectric layer is over the lower dielectric structure and includes sidewalls defining a plurality of openings extending through the first dielectric layer. A lower electrode is arranged along the sidewalls and over an upper surface of the first dielectric layer, a capacitor dielectric is arranged along sidewalls and an upper surface of the lower electrode, and an upper electrode is arranged along sidewalls and an upper surface of the capacitor dielectric. A spacer is along opposing outermost sidewalls of the upper electrode. The spacer has an outermost surface extending from a lowermost surface of the spacer to a top of the spacer. The outermost surface is substantially aligned with an outermost sidewall of the lower electrode.Type: GrantFiled: July 28, 2023Date of Patent: November 26, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ching-Sheng Chu, Dun-Nian Yaung, Yu-Cheng Tsai, Meng-Hsien Lin, Ching-Chung Su, Jen-Cheng Liu, Wen-De Wang, Guan-Hua Chen
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Publication number: 20240387613Abstract: The present disclosure, in some embodiments, relates to a capacitor structure. The capacitor structure includes one or more lower interconnects disposed within a lower dielectric structure over a substrate. A lower electrode is arranged along sidewalls and an upper surface of the lower dielectric structure, a capacitor dielectric is arranged along sidewalls and an upper surface of the lower electrode, and an upper electrode is arranged along sidewalls and an upper surface of the capacitor dielectric. A spacer is arranged along outermost sidewalls of the upper electrode. The spacer includes a first upper surface arranged along a first side of the upper electrode and a second upper surface arranged along an opposing second side of the upper electrode. The first upper surface has a different width than the second upper surface.Type: ApplicationFiled: July 25, 2024Publication date: November 21, 2024Inventors: Ching-Sheng Chu, Dun-Nian Yaung, Yu-Cheng Tsai, Meng-Hsien Lin, Ching-Chung Su, Jen-Cheng Liu, Wen-De Wang, Guan-Hua Chen
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Publication number: 20230369389Abstract: The present disclosure, in some embodiments, relates to a metal-insulator-metal (MIM) capacitor structure. The MIM capacitor structure includes one or more lower interconnects disposed within a lower dielectric structure over a substrate. A first dielectric layer is over the lower dielectric structure and includes sidewalls defining a plurality of openings extending through the first dielectric layer. A lower electrode is arranged along the sidewalls and over an upper surface of the first dielectric layer, a capacitor dielectric is arranged along sidewalls and an upper surface of the lower electrode, and an upper electrode is arranged along sidewalls and an upper surface of the capacitor dielectric. A spacer is along opposing outermost sidewalls of the upper electrode. The spacer has an outermost surface extending from a lowermost surface of the spacer to a top of the spacer. The outermost surface is substantially aligned with an outermost sidewall of the lower electrode.Type: ApplicationFiled: July 28, 2023Publication date: November 16, 2023Inventors: Ching-Sheng Chu, Dun-Nian Yaung, Yu-Cheng Tsai, Meng-Hsien Lin, Ching-Chung Su, Jen-Cheng Liu, Wen-De Wang, Guan-Hua Chen
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Patent number: 11769791Abstract: The present disclosure, in some embodiments, relates to a method of forming a capacitor structure. The method includes forming a capacitor dielectric layer over a lower electrode layer, and forming an upper electrode layer over the capacitor dielectric layer. The upper electrode layer is etched to define an upper electrode and to expose a part of the capacitor dielectric layer. A spacer structure is formed over horizontally extending surfaces of the upper electrode layer and the capacitor dielectric layer and also along sidewalls of the upper electrode. The spacer structure is etched to remove the spacer structure from over the horizontally extending surfaces of the upper electrode layer and the capacitor dielectric layer and to define a spacer. The capacitor dielectric layer and the lower electrode layer are etched according to the spacer to define a capacitor dielectric and a lower electrode.Type: GrantFiled: May 5, 2021Date of Patent: September 26, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ching-Sheng Chu, Dun-Nian Yaung, Yu-Cheng Tsai, Meng-Hsien Lin, Ching-Chung Su, Jen-Cheng Liu, Wen-De Wang, Guan-Hua Chen
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Publication number: 20220238636Abstract: The present disclosure, in some embodiments, relates to a method of forming a capacitor structure. The method includes forming a capacitor dielectric layer over a lower electrode layer, and forming an upper electrode layer over the capacitor dielectric layer. The upper electrode layer is etched to define an upper electrode and to expose a part of the capacitor dielectric layer. A spacer structure is formed over horizontally extending surfaces of the upper electrode layer and the capacitor dielectric layer and also along sidewalls of the upper electrode. The spacer structure is etched to remove the spacer structure from over the horizontally extending surfaces of the upper electrode layer and the capacitor dielectric layer and to define a spacer. The capacitor dielectric layer and the lower electrode layer are etched according to the spacer to define a capacitor dielectric and a lower electrode.Type: ApplicationFiled: May 5, 2021Publication date: July 28, 2022Inventors: Ching-Sheng Chu, Dun-Nian Yaung, Yu-Cheng Tsai, Meng-Hsien Lin, Ching-Chung Su, Jen-Cheng Liu, Wen-De Wang, Guan-Hua Chen
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Patent number: 10596963Abstract: A fatigue alarm apparatus having a fatigue detector, a control unit and a stimulus alarm generator is illustrated. The fatigue detector detects whether a driver is drowsy. The control unit is electrically connected to the fatigue detector and the stimulus alarm generator. When the fatigue detector detects that the driver is drowsy, the stimulus alarm generator controlled by the control unit to generate two stimulus alarms having a rest time period therebetween, and then, after an interval period elapses, the control unit determines whether an alarming procedure of generating the two stimulus alarms is to be interrupted or repeated, wherein the rest time period is less than the interval period.Type: GrantFiled: October 25, 2018Date of Patent: March 24, 2020Assignee: LATTICE ENERGY TECHNOLOGY CORPORATIONInventors: Ta-Yi Chien, Pai-Hsiang Cheng, Ying-Ju Lai, Chang-Sheng Lin, Yung-Chou Chen, Guan-Hua Chen, Hsiang-Fu Fan, Yu-Kai Lin, Wen-Jing Xie
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Publication number: 20190126820Abstract: A fatigue alarm apparatus having a fatigue detector, a control unit and a stimulus alarm generator is illustrated. The fatigue detector detects whether a driver is drowsy. The control unit is electrically connected to the fatigue detector and the stimulus alarm generator. When the fatigue detector detects that the driver is drowsy, the stimulus alarm generator controlled by the control unit to generate two stimulus alarms having a rest time period therebetween, and then, after an interval period elapses, the control unit determines whether an alarming procedure of generating the two stimulus alarms is to be interrupted or repeated, wherein the rest time period is less than the interval period.Type: ApplicationFiled: October 25, 2018Publication date: May 2, 2019Inventors: TA-YI CHIEN, PAI-HSIANG CHENG, YING-JU LAI, CHANG-SHENG LIN, YUNG-CHOU CHEN, GUAN-HUA CHEN, HSIANG-FU FAN, YU-KAI LIN, WEN-JING XIE
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Patent number: 6510455Abstract: A system, a device and their relative methods for displaying the latest messages from an E-mail account under the conditions where there is no need to take the initiative in turning on a computer are disclosed. The incoming E-mail displaying system comprises: a displaying device for displaying new mails arrived from an E-mail box; a mail message service device responsive for searching a mail message in Internet, and responsive for transmitting the mail message through a transmission path; and a switching device responsive to the transmission path for receiving the mail message from the mail message service device and transmitting the mail message to the displaying device. Moreover, the displaying device can be further designed to comprise an input module, a telephone interface end, a displaying module, and a modem having embedded TCP/IP and E-mail client application et cetera functions. That is, enabling the displaying device to make a direct connection to Internet.Type: GrantFiled: September 1, 1999Date of Patent: January 21, 2003Assignee: Inventec CorporationInventors: Guan-Hua Chen, Yong-Cai Bian, Cheng-Shing Lai, Jing Cao