Abstract: A method of processing a substrate is disclosed which includes depositing a layer in a processing chamber on a field region, a sidewall region, and a fill region of a feature of the substrate, wherein a hardness of a portion of the layer deposited on the sidewall region is lower than a hardness of a portion of the layer deposited on the field region, and lower than a hardness of a portion of the layer deposited on the fill region.

Abstract: Methods and apparatus for cleaning tooling parts in a substrate processing tool are provided herein.

Abstract: The present disclosure relates to through-via structures with dielectric shielding of interconnections for advanced wafer level semiconductor packaging. The methods described herein enable the formation of high thickness dielectric shielding layers within low aspect ratio through-via structures, thus facilitating thin and small-form-factor package structures having high I/O density with improved bandwidth and power.

Abstract: Methods, systems, and apparatus for cleaning and drying a tape-frame substrate are provided. In embodiments, an apparatus for supporting a tape-frame substrate includes a chuck having a first side and a second side opposite the first side, the first side having a convex surface configured to support the tape-frame substrate; and a plurality of channels extending through the chuck and having outlets along the first side, wherein the plurality of channels are configured to dispense fluid from the outlets along the convex surface of the first side. In embodiments, a support system includes the chuck and a holder configured to mount a tape-frame substrate to the chuck. The plurality of channels are configured to dispense fluid from the outlets and between the tape-frame substrate and the convex surface of the chuck when the tape-frame substrate is mounted to the chuck.

Abstract: A method for forming alignment marks leverages pad density and critical dimensions (CDs). In some embodiments, the method includes forming first and second alignment marks on a first substrate and a second substrate where the alignment marks have a width within 5% of the associated CD of copper pads on the respective substrates and forming a first and second dummy patterns around the first and second alignment marks. The first and second dummy patterns have dummy pattern densities within 5% of the respective copper pad density of the first and second substrates and CDs within 5% of the respective copper pad CDs. In some embodiments, alignment marks with physical dielectric material protrusions and recesses on opposite substrate surfaces may further enhance bonding.

Abstract: A method for forming alignment marks leverages pad density and critical dimensions (CDs). In some embodiments, the method includes forming first and second alignment marks on a first substrate and a second substrate where the alignment marks have a width within 5% of the associated CD of copper pads on the respective substrates and forming a first and second dummy patterns around the first and second alignment marks. The first and second dummy patterns have dummy pattern densities within 5% of the respective copper pad density of the first and second substrates and CDs within 5% of the respective copper pad CDs. In some embodiments, alignment marks with physical dielectric material protrusions and recesses on opposite substrate surfaces may further enhance bonding.

Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.

Abstract: The present disclosure relates to through-via structures with dielectric shielding of interconnections for advanced wafer level semiconductor packaging. The methods described herein enable the formation of high thickness dielectric shielding layers within low aspect ratio through-via structures, thus facilitating thin and small-form-factor package structures having high I/O density with improved bandwidth and power.

Abstract: Methods, systems, and apparatus for cleaning and drying a tape-frame substrate are provided. In embodiments, an apparatus for supporting a tape-frame substrate includes a chuck having a first side and a second side opposite the first side, the first side having a convex surface configured to support the tape-frame substrate; and a plurality of channels extending through the chuck and having outlets along the first side, wherein the plurality of channels are configured to dispense fluid from the outlets along the convex surface of the first side. In embodiments, a support system includes the chuck and a holder configured to mount a tape-frame substrate to the chuck. The plurality of channels are configured to dispense fluid from the outlets and between the tape-frame substrate and the convex surface of the chuck when the tape-frame substrate is mounted to the chuck.

Abstract: A method of forming a magnetic core on a substrate having a stacked inductor coil includes etching a plurality of polymer layers to form at least one feature through the plurality of polymer layers, wherein the at least one feature is disposed within a central region of a stacked inductor coil formed on the substrate; and depositing a magnetic material within the at least one feature.

Abstract: Apparatus for extending substrate queue time for hybrid bonding by preserving plasma activation. In some embodiments, the apparatus may include an environmentally controllable space with a support for holding a die or a substrate, a gas velocity accelerator that recirculates one or more gases laterally across the support, a filter, a humidifier apparatus that is fluidly connected to the environmentally controllable space, wherein the humidifier apparatus enables controllable humidity levels within the environmentally controllable space, a pressurizing apparatus fluidly connected to the humidifier apparatus on an output and fluidly connected to at least one gas supply on an input, a relative humidity (RH) sensor positioned within the environmentally controllable space, and an environment controller in communication with at least the humidifier apparatus and the RH sensor, wherein the environment controller is configured to maintain an RH level of approximately 80% to approximately 95%.

Abstract: Methods, apparatuses and systems in an integrated bonding system for optimizing bonding alignment between dies and a substrates include bonding, using a bonder of the integrated bonding system, a first die to a first substrate using preset alignment settings, transferring, using a transfer arm/robot of the integrated bonding system, the bonded die-substrate combination to an on-board inspection tool of the integrated bonding system, inspecting, at the on-board inspection tool, an alignment of the bond between the die and the substrate of the bonded die-substrate combination to determine a misalignment measure representing a misalignment of the bond between the die and the substrate of the bonded die-substrate combination, determining from the misalignment measurement, using a machine learning process, a correction measurement to be communicated to the bonder, and bonding, in the bonder, a different die to a different substrate using the determined machine-learning based correction measurement.

Abstract: Methods of bonding one or more dies to a substrate are provided herein. In some embodiments, a method of bonding one or more dies to a substrate includes: applying a material coating on the one or more dies or the substrate; placing the one or more dies on the substrate so that the one or more dies temporarily adhere to the substrate via surface tension or tackiness of the material coating; inspecting each of the one or more dies that are placed on the substrate for defects; and removing any of the one or more dies that are found to have defects.

Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.

Abstract: Methods and apparatus for processing a first substrate and a second substrate are provided herein. For example, a method of processing a substrate using extended spectroscopic ellipsometry (ESE) includes directing a beam from an extended spectroscopic ellipsometer toward a first surface of a first substrate and a second surface of a second substrate, which is different than the first substrate, determining in-situ ESE data from each of the first surface and the second surface during processing of the first substrate and the second substrate, measuring a change of phase and amplitude in determined in-situ ESE data, and determining one or more parameters of the first surface of the first substrate and the second surface of the second substrate using simultaneously complex dielectric function, optical conductivity, and electronic correlations from the measured change of phase and amplitude in the in-situ ESE data.

Abstract: Methods, systems, and apparatus for cleaning and drying a tape-frame substrate are provided. In embodiments, an apparatus for supporting a tape-frame substrate includes a chuck having a first side and a second side opposite the first side, the first side having a convex surface configured to support the tape-frame substrate; and a plurality of channels extending through the chuck and having outlets along the first side, wherein the plurality of channels are configured to dispense fluid from the outlets along the convex surface of the first side. In embodiments, a support system includes the chuck and a holder configured to mount a tape-frame substrate to the chuck. The plurality of channels are configured to dispense fluid from the outlets and between the tape-frame substrate and the convex surface of the chuck when the tape-frame substrate is mounted to the chuck.

Abstract: Methods and apparatus for processing a substrate area provided herein. For example, methods for enhancing surface hydrophilicity on a substrate comprise a) supplying, using a remote plasma source, water vapor plasma to a processing volume of a plasma processing chamber to treat a bonding surface of the substrate, b) supplying at least one of microwave power or RF power at a frequency from about 1 kHz to 10 GHz and a power from about 1 kW to 10 kW to the plasma processing chamber to maintain the water vapor plasma within the processing volume during operation, and c) continuing a) and b) until the bonding surface of the substrate has a hydrophilic contact angle of less than 10°.

Abstract: Semiconductor devices and methods of manufacturing the same are described. Transistors are fabricated using a standard process flow. A via opening extending from the top surface of the substrate to a bottom surface of the wafer device is formed, thus allowing nano TSV for high density packaging, as well as connecting the device to the backside power rail. A metal is deposited in the via opening, and the bottom surface of the wafer device is bound to a bonding wafer. The substrate is optionally thinned, and a contact electrically connected to the metal is formed.

Abstract: Semiconductor devices and methods of manufacturing the same are described. The method includes front side processing to form a deep source/drain cavity and filling the cavity with a sacrificial material. The sacrificial material is then removed during processing of the backside to form a backside power rail via that is filled with a metal fill.

Abstract: Semiconductor devices and methods of manufacturing the same are described. A silicon wafer is provided and a buried etch stop layer is formed on the silicon wafer. The wafer is then subjected to device and front-end processing. After front-end processing, the wafer undergoes hybrid bonding, and then the wafer is thinned. To thin the wafer, the silicon substrate layer, which has a starting first thickness, is ground to a second thickness, the second thickness less than the first thickness. After grinding, the silicon wafer is subjected to chemical mechanical planarization (CMP), followed by etching and CMP buffing, to reduce the thickness of the silicon to a third thickness, the third thickness less than the second thickness.