Patents by Inventor Guan Wei
Guan Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12361574Abstract: A depth camera capable of measuring the oblique velocity of an object is provided, wherein a depth camera capable of measuring the lateral velocity of an object includes a depth camera body, a first configuration file, and a lateral velocity calculation system. The lateral velocity calculation system includes: first image-processing software for recording a first depth distance at which images are taken of an object and for calculating the number of pixels corresponding to a lateral movement of the object and the duration of the lateral movement; and lateral velocity calculation software for calculating the lateral velocity of the object. The depth camera capable of measuring the oblique velocity of an object allows the lateral/longitudinal/oblique velocity of an object to be measured in real time using image-related techniques.Type: GrantFiled: October 11, 2023Date of Patent: July 15, 2025Assignee: National Central UniversityInventors: Wen-Hsin Sun, Jun-Yi Yu, Siang-Siuan Tsai, Guan-Wei Huang, Ching-Cherng Sun
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Publication number: 20250224591Abstract: A couple-in lens assembly includes a first lens, a second lens, a third lens, a fourth lens, a fifth lens, a sixth lens, a seventh lens, an eighth lens and a ninth lens. The second lens is located above the first lens. The third lens is attached above the second lens. The fourth lens is located above the third lens. The fifth lens is located above the fourth lens. The sixth lens is attached above the fifth lens. The seventh lens is located above the sixth lens. The eighth lens is located above the seventh lens. The ninth lens is attached above the eighth lens.Type: ApplicationFiled: April 1, 2024Publication date: July 10, 2025Inventors: Jun-Yi YU, Guan-Wei HUANG, Wei-Chia SU, Wen-Kai LIN, Shao-Kui ZHOU, Yuan-Yan LIANG, Ching-Cherng SUN, Wen-Hsin SUN, Huai-Chih CHANG
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Publication number: 20250196243Abstract: An electrical discharge machining equipment with equal-energy density comprises an electrode, a parameter database, a signal capturing device and a controller. The parameter database stores an equal-energy density sheet comprising a plurality of processing parameter sets. Each processing parameter set is corresponding to a material removed volume and comprises a discharge energy, a discharge parameter, a feed rate and an energy density. The signal capturing device detects a first discharge parameter of the electrode during machining a work piece. The controller selects a first feed rate to control the electrode. When the first discharge parameter changes to a second discharge parameter, the controller calculates a material volume of the workpiece according to the second discharge parameter and the equal-energy density sheet, and selects a second feed rate according to the material volume, the material removed volume and the equal-energy density sheet to control the electrode for processing the workpiece.Type: ApplicationFiled: March 8, 2024Publication date: June 19, 2025Inventors: Shun-Tong Chen, En-Ruei Jhang, Guan-Wei Chen, Hua-Yu Tseng, Chen-Fu Tsai
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Publication number: 20250138283Abstract: A coupled lens structure for a mixed/augmented reality system includes: a lens tube; a first lens with a first aspherical light input surface coupled to a lens-tube light input surface; a second lens with a second spherical light input surface optically coupled to a first spherical light output surface of the first lens; a third lens with a third spherical light input surface optically coupled to a second aspherical light output surface of the second lens; and a fourth lens with a fourth spherical light input surface optically coupled to a third spherical light output surface of the third lens and a fourth spherical light output surface coupled to a lens-tube light output surface. The coupled lens structure has volume of 2.1-3 cc, a lens-tube outer diameter of 12-13.5 mm, and a full angle of view not greater than 30 degrees, featuring an effective reduction in volume and weight.Type: ApplicationFiled: January 2, 2024Publication date: May 1, 2025Inventors: Ying-Shun SHIU, Guan-Wei HUANG, Jun-Yi YU, Wen-Hsin SUN, Wei-Chia SU, Wen-Kai LIN, Shao-Kui ZHOU, Yuan-Yan LIANG, Ching-Cherng SUN
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Patent number: 12282353Abstract: A clock control circuit module, a memory storage device, and a clock control method are disclosed. The clock control circuit module is configured to: generate a clock signal; receive a first signal and the clock signal and sample the first signal according to the clock signal to generate a first sampling signal and a second sampling signal; obtain first position information corresponding to a first transition point of a first target signal and second position information corresponding to a second transition point of a second target signal according to the first sampling signal and the second sampling signal respectively; and evaluate a frequency shift status between the first signal and the clock signal according to the first position information and the second position information.Type: GrantFiled: April 25, 2023Date of Patent: April 22, 2025Assignee: PHISON ELECTRONICS CORP.Inventors: Shih-Yang Sun, Guan-Wei Wu
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Publication number: 20250045941Abstract: A depth camera capable of measuring the oblique velocity of an object is provided, wherein a depth camera capable of measuring the lateral velocity of an object includes a depth camera body, a first configuration file, and a lateral velocity calculation system. The lateral velocity calculation system includes: first image-processing software for recording a first depth distance at which images are taken of an object and for calculating the number of pixels corresponding to a lateral movement of the object and the duration of the lateral movement; and lateral velocity calculation software for calculating the lateral velocity of the object. The depth camera capable of measuring the oblique velocity of an object allows the lateral/longitudinal/oblique velocity of an object to be measured in real time using image-related techniques.Type: ApplicationFiled: October 11, 2023Publication date: February 6, 2025Inventors: Wen-Hsin SUN, Jun-Yi YU, Siang-Siuan TSAI, Guan-Wei HUANG, Ching-Cherng SUN
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Publication number: 20250014948Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a single diffusion break (SDB) structure in the fin-shaped structure to divide the first fin-shaped structure into a first portion and a second portion, and more than two gate structures on the SDB structure. Preferably, the more than two gate structures include a first gate structure, a second gate structure, a third gate structure, and a fourth gate structure disposed on the SDB structure.Type: ApplicationFiled: September 15, 2024Publication date: January 9, 2025Applicant: UNITED MICROELECTRONICS CORP.Inventors: Fu-Jung Chuang, Po-Jen Chuang, Yu-Ren Wang, Chi-Mao Hsu, Chia-Ming Kuo, Guan-Wei Huang, Chun-Hsien Lin
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Publication number: 20240379393Abstract: In certain embodiments, a workstation includes: a cleaning station configured to clean a die vessel, wherein the die vessel is configured to secure a semiconductor die; an inspection station configured to inspect the die vessel after cleaning to determine whether the die vessel is identified as passing inspection; and a conveyor configured to move the die vessel between the cleaning station and the inspection station.Type: ApplicationFiled: July 25, 2024Publication date: November 14, 2024Inventors: Tsung-Sheng KUO, Guan-Wei HUANG, Chih-Hung HUANG, Yang-Ann CHU, Hsu-Shui LIU, Jiun-Rong PAI
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Publication number: 20240363635Abstract: A semiconductor structure that includes a first semiconductor fin and a second semiconductor fin disposed over a substrate and adjacent to each other, a metal gate stack disposed over the substrate, and source/drain features disposed in each of the first semiconductor fin and the second semiconductor fin to engage with the metal gate stack. The metal gate stack includes a first region disposed over the first semiconductor fin, a second region disposed over the second semiconductor fin, and a third region connecting the first region to the second region in a continuous profile, where the first region is defined by a first gate length and the second region is defined by a second gate length less than the first gate length.Type: ApplicationFiled: July 11, 2024Publication date: October 31, 2024Inventors: Guan-Wei Huang, Yu-Shan Lu, Yu-Bey Wu, Jiun-Ming Kuo, Yuan-Ching Peng
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Patent number: 12125725Abstract: In certain embodiments, a workstation includes: a cleaning station configured to clean a die vessel, wherein the die vessel is configured to secure a semiconductor die; an inspection station configured to inspect the die vessel after cleaning to determine whether the die vessel is identified as passing inspection; and a conveyor configured to move the die vessel between the cleaning station and the inspection station.Type: GrantFiled: July 14, 2023Date of Patent: October 22, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Tsung-Sheng Kuo, Guan-Wei Huang, Chih-Hung Huang, Yang-Ann Chu, Hsu-Shui Liu, Jiun-Rong Pai
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Patent number: 12119272Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a single diffusion break (SDB) structure in the fin-shaped structure to divide the first fin-shaped structure into a first portion and a second portion, and more than two gate structures on the SDB structure. Preferably, the more than two gate structures include a first gate structure, a second gate structure, a third gate structure, and a fourth gate structure disposed on the SDB structure.Type: GrantFiled: August 14, 2023Date of Patent: October 15, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Fu-Jung Chuang, Po-Jen Chuang, Yu-Ren Wang, Chi-Mao Hsu, Chia-Ming Kuo, Guan-Wei Huang, Chun-Hsien Lin
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Publication number: 20240310870Abstract: A clock control circuit module, a memory storage device, and a clock control method are disclosed. The clock control circuit module is configured to: generate a clock signal; receive a first signal and the clock signal and sample the first signal according to the clock signal to generate a first sampling signal and a second sampling signal; obtain first position information corresponding to a first transition point of a first target signal and second position information corresponding to a second transition point of a second target signal according to the first sampling signal and the second sampling signal respectively; and evaluate a frequency shift status between the first signal and the clock signal according to the first position information and the second position information.Type: ApplicationFiled: April 25, 2023Publication date: September 19, 2024Applicant: PHISON ELECTRONICS CORP.Inventors: Shih-Yang Sun, Guan-Wei Wu
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Patent number: 12080715Abstract: A semiconductor structure that includes a first semiconductor fin and a second semiconductor fin disposed over a substrate and adjacent to each other, a metal gate stack disposed over the substrate, and source/drain features disposed in each of the first semiconductor fin and the second semiconductor fin to engage with the metal gate stack. The metal gate stack includes a first region disposed over the first semiconductor fin, a second region disposed over the second semiconductor fin, and a third region connecting the first region to the second region in a continuous profile, where the first region is defined by a first gate length and the second region is defined by a second gate length less than the first gate length.Type: GrantFiled: August 20, 2021Date of Patent: September 3, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Guan-Wei Huang, Yu-Shan Lu, Yu-Bey Wu, Jiun-Ming Kuo, Yuan-Ching Peng
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Publication number: 20240213067Abstract: A system and computer-implemented method are provided for manufacturing a semiconductor electronic device. An assembler receives a jig and a boat supporting a die. The assembler includes a separator that separates the jig into a first jig portion and a second jig portion and a loader that positions the boat between the first jig portion and the second jig portion. A robot receives an assembly prepared by the assembler and manipulates a locking system that fixes an alignment of the boat relative to the first jig portion and the second jig portion to form a locked assembly. A process chamber receives the locked assembly and subjects the locked assembly to a fabrication operation.Type: ApplicationFiled: March 11, 2024Publication date: June 27, 2024Inventors: Tsung-Sheng KUO, Chih-Hung HUANG, Guan-Wei HUANG, Ping-Yung YEN, Hsuan LEE, Jiun-Rong PAI
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Publication number: 20240162612Abstract: The present disclosure provides an electronic device. The electronic device includes a first transceiving element, a second transceiving element disposed over the first transceiving element, and a radiating structure configured to radiate a first EM wave having a lower frequency and a second EM wave having a higher frequency. The first transceiving element and the second transceiving element are collectively configured to provide a higher gain or bandwidth for the first EM wave than for the second EM wave.Type: ApplicationFiled: November 10, 2022Publication date: May 16, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Po-An LIN, Guan-Wei CHEN, Shih-Wen LU
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Patent number: 11929273Abstract: A system and computer-implemented method are provided for manufacturing a semiconductor electronic device. An assembler receives a jig and a boat supporting a die. The assembler includes a separator that separates the jig into a first jig portion and a second jig portion and a loader that positions the boat between the first jig portion and the second jig portion. A robot receives an assembly prepared by the assembler and manipulates a locking system that fixes an alignment of the boat relative to the first jig portion and the second jig portion to form a locked assembly. A process chamber receives the locked assembly and subjects the locked assembly to a fabrication operation.Type: GrantFiled: July 27, 2020Date of Patent: March 12, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITEDInventors: Tsung-Sheng Kuo, Chih-Hung Huang, Guan-Wei Huang, Ping-Yung Yen, Hsuan Lee, Jiun-Rong Pai
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Patent number: 11904482Abstract: A mechanical arm calibration system and a mechanical arm calibration method are provided. The method includes: locating a position of an end point of a mechanical arm in a three-dimensional space to calculate an actual motion trajectory of the end point when the mechanical arm is operating; retrieving link parameters of the mechanical arm, randomly generating sets of particles including compensation amounts for the link parameters through particle swarm optimization (PSO), importing the compensation amounts of each of the sets of particles into forward kinematics after addition of the corresponding link parameters, to calculate an adaptive motion trajectory of the end point; calculating position errors between the adaptive motion trajectory and the actual motion trajectory of each of the sets of particles for a fitness value of the PSO to estimate a group best position; and updating the link parameters by the compensation amounts corresponding to the group best position.Type: GrantFiled: April 1, 2021Date of Patent: February 20, 2024Assignee: Industrial Technology Research InstituteInventors: Jun-Yi Jiang, Yen-Cheng Chen, Chung-Yin Chang, Guan-Wei Su, Qi-Zheng Yang
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Publication number: 20230386939Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a single diffusion break (SDB) structure in the fin-shaped structure to divide the first fin-shaped structure into a first portion and a second portion, and more than two gate structures on the SDB structure. Preferably, the more than two gate structures include a first gate structure, a second gate structure, a third gate structure, and a fourth gate structure disposed on the SDB structure.Type: ApplicationFiled: August 14, 2023Publication date: November 30, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventors: Fu-Jung Chuang, Po-Jen Chuang, Yu-Ren Wang, Chi-Mao Hsu, Chia-Ming Kuo, Guan-Wei Huang, Chun-Hsien Lin
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Patent number: 11823751Abstract: A memory device and an operation method thereof are provided. The operation method includes: when a read operation or a write-verify operation is completed, during a word line voltage lowering phase, synchronously applying a plurality of different gradually lowering signal line reference voltages to a plurality of ground select lines and a plurality of string select lines, wherein values of the different gradually lowering signal line reference voltages are corresponding to a plurality of signal line positions of the ground select lines and the string select lines.Type: GrantFiled: February 24, 2022Date of Patent: November 21, 2023Assignee: MACRONIX INTERNATIONAL CO., LTD.Inventors: Guan-Wei Wu, Yao-Wen Chang, I-Chen Yang
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Publication number: 20230360939Abstract: In certain embodiments, a workstation includes: a cleaning station configured to clean a die vessel, wherein the die vessel is configured to secure a semiconductor die; an inspection station configured to inspect the die vessel after cleaning to determine whether the die vessel is identified as passing inspection; and a conveyor configured to move the die vessel between the cleaning station and the inspection station.Type: ApplicationFiled: July 14, 2023Publication date: November 9, 2023Inventors: Tsung-Sheng KUO, Guan-Wei HUANG, Chih-Hung HUANG, Yang-Ann CHU, Hsu-Shui LIU, Jiun-Rong PAI