Patents by Inventor Guan Wei
Guan Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12282353Abstract: A clock control circuit module, a memory storage device, and a clock control method are disclosed. The clock control circuit module is configured to: generate a clock signal; receive a first signal and the clock signal and sample the first signal according to the clock signal to generate a first sampling signal and a second sampling signal; obtain first position information corresponding to a first transition point of a first target signal and second position information corresponding to a second transition point of a second target signal according to the first sampling signal and the second sampling signal respectively; and evaluate a frequency shift status between the first signal and the clock signal according to the first position information and the second position information.Type: GrantFiled: April 25, 2023Date of Patent: April 22, 2025Assignee: PHISON ELECTRONICS CORP.Inventors: Shih-Yang Sun, Guan-Wei Wu
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Publication number: 20250126302Abstract: A metadata-aided film-grain removal method and corresponding apparatus. An example embodiment enables a video decoder to substantially fully remove the film grain from a digital video signal that has undergone lossy video compression and then video decompression. Different embodiments may rely only on spatial-domain grain-removal processing, only on temporal-domain grain-removal processing, or on a combination of spatial-domain and temporal-domain grain-removal processing. Both spatial-domain and temporal-domain grain-removal processing may use metadata provided by the corresponding video encoder, the metadata including one or more parameters corresponding to the digital film grain injected into the host video at the encoder. Different film-grain-injection formats can be accommodated by the video decoder using signal preprocessing directed at supplying, to the film-grain removal module of the video decoder, an input compatible with the film-grain removal method implemented therein.Type: ApplicationFiled: April 18, 2023Publication date: April 17, 2025Applicant: DOLBY LABORATORIES LICENSING CORPORATIONInventors: Guan-Ming Su, Peng Yin, Tsung-Wei Huang
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Publication number: 20250117904Abstract: Guided filtering is applied, with a camera raw image as a guidance image, to a first image to generate an intermediate image. A dynamic range mapping is performed on the intermediate image to generate a second image of a different dynamic range. The second image is used to generate specific local reshaping function index values for selecting specific local reshaping functions. The specific local reshaping functions are applied to the second image to generate a locally reshaped image.Type: ApplicationFiled: March 8, 2023Publication date: April 10, 2025Applicant: Dolby Laboratories Licensing CorporationInventors: Guan-Ming SU, Tsung-Wei HUANG, Tao CHEN
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Publication number: 20250062129Abstract: Embodiments of the disclosure include an apparatus and method of forming a backside profile in a semiconductor device that includes die-to-wafer bonding. The method generally includes removing a portion of a substrate layer included in a plurality of dies, the plurality of dies arranged on and bonded to an insulation layer included in a support structure, where the plurality of dies define a plurality of channels between adjacent dies, and forming a corner feature on a plurality of corners of the substrate layer adjacent to the plurality of channels. The use of a backside profile as described herein may mitigate the downstream process risks associated with trapped residue in the channels, and provide stress relief to the semiconductor device.Type: ApplicationFiled: August 16, 2023Publication date: February 20, 2025Inventors: Yin Wei LIM, Guan Huei SEE, Chang Bum YONG, Prayudi LIANTO, Arvind SUNDARRAJAN, Cheng SUN
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Patent number: 12222576Abstract: An optical element driving mechanism includes a movable assembly, a fixed assembly, and a driving assembly. The movable assembly is configured to be connected to an optical element. The movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly in a range of motion. The optical element driving mechanism further includes a positioning assembly configured to position the movable assembly at a predetermined position relative to the fixed assembly when the driving assembly is not operating.Type: GrantFiled: November 9, 2023Date of Patent: February 11, 2025Assignee: TDK TAIWAN CORP.Inventors: Chao-Chang Hu, Kuen-Wang Tsai, Liang-Ting Ho, Chao-Hsi Wang, Chih-Wei Weng, He-Ling Chang, Che-Wei Chang, Sheng-Zong Chen, Ko-Lun Chao, Min-Hsiu Tsai, Shu-Shan Chen, Jungsuck Ryoo, Mao-Kuo Hsu, Guan-Yu Su
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Publication number: 20250045941Abstract: A depth camera capable of measuring the oblique velocity of an object is provided, wherein a depth camera capable of measuring the lateral velocity of an object includes a depth camera body, a first configuration file, and a lateral velocity calculation system. The lateral velocity calculation system includes: first image-processing software for recording a first depth distance at which images are taken of an object and for calculating the number of pixels corresponding to a lateral movement of the object and the duration of the lateral movement; and lateral velocity calculation software for calculating the lateral velocity of the object. The depth camera capable of measuring the oblique velocity of an object allows the lateral/longitudinal/oblique velocity of an object to be measured in real time using image-related techniques.Type: ApplicationFiled: October 11, 2023Publication date: February 6, 2025Inventors: Wen-Hsin SUN, Jun-Yi YU, Siang-Siuan TSAI, Guan-Wei HUANG, Ching-Cherng SUN
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Patent number: 12216326Abstract: An optical member driving mechanism for connecting an optical member is provided, including a fixed portion and a first adhesive member. The fixed portion includes a first member and a second member, wherein the first member is fixedly connected to the second member via the first adhesive member.Type: GrantFiled: March 26, 2021Date of Patent: February 4, 2025Assignee: TDK TAIWAN CORP.Inventors: Hsiang-Chin Lin, Shou-Jen Liu, Guan-Bo Wang, Kai-Po Fan, Chan-Jung Hsu, Shao-Chung Chang, Shih-Wei Hung, Ming-Chun Hsieh, Wei-Pin Chin, Sheng-Zong Chen, Yu-Huai Liao, Sin-Hong Lin, Wei-Jhe Shen, Tzu-Yu Chang, Kun-Shih Lin, Che-Hsiang Chiu, Sin-Jhong Song
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Publication number: 20250031432Abstract: Structures for an extended-drain metal-oxide-semiconductor device and methods of forming a structure for an extended-drain metal-oxide-semiconductor device. The structure comprises a semiconductor layer, a source region, a drain region, and a gate positioned between the source region and the drain region. The gate includes a gate conductor layer, a first gate dielectric layer having a first thickness, and a second gate dielectric layer having a second thickness greater than the first thickness. The first gate dielectric layer is disposed on a top surface of the semiconductor layer, and the second gate dielectric layer includes a first section on the top surface of the semiconductor layer and a second section adjacent to a sidewall of the semiconductor layer. The gate conductor layer has an overlapping relationship with the first gate dielectric layer, the first section of the second gate dielectric layer, and the second section of the second gate dielectric layer.Type: ApplicationFiled: July 18, 2023Publication date: January 23, 2025Inventors: Fangyue Liu, Rui Tze Toh, Chen Xin, Boon Guan Oon, Jason Kin Wei Wong, Yung Fu Chong
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Patent number: 12206907Abstract: A global index value is generated for selecting a global reshaping function for an input image of a relatively low dynamic range using luma codewords in the input image. Image filtering is applied to the input image to generate a filtered image. The filtered values of the filtered image provide a measure of local brightness levels in the input image. Local index values are generated for selecting specific local reshaping functions for the input image using the global index value and the filtered values of the filtered image. A reshaped image of a relatively high dynamic range is generated by reshaping the input image with the specific local reshaping functions selected using the local index values.Type: GrantFiled: October 1, 2021Date of Patent: January 21, 2025Assignee: DOLBY LABORATORIES LICENSING CORPORATIONInventors: Tsung-Wei Huang, Guan-Ming Su, Neeraj J. Gadgil
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Publication number: 20250014948Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a single diffusion break (SDB) structure in the fin-shaped structure to divide the first fin-shaped structure into a first portion and a second portion, and more than two gate structures on the SDB structure. Preferably, the more than two gate structures include a first gate structure, a second gate structure, a third gate structure, and a fourth gate structure disposed on the SDB structure.Type: ApplicationFiled: September 15, 2024Publication date: January 9, 2025Applicant: UNITED MICROELECTRONICS CORP.Inventors: Fu-Jung Chuang, Po-Jen Chuang, Yu-Ren Wang, Chi-Mao Hsu, Chia-Ming Kuo, Guan-Wei Huang, Chun-Hsien Lin
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Publication number: 20240379393Abstract: In certain embodiments, a workstation includes: a cleaning station configured to clean a die vessel, wherein the die vessel is configured to secure a semiconductor die; an inspection station configured to inspect the die vessel after cleaning to determine whether the die vessel is identified as passing inspection; and a conveyor configured to move the die vessel between the cleaning station and the inspection station.Type: ApplicationFiled: July 25, 2024Publication date: November 14, 2024Inventors: Tsung-Sheng KUO, Guan-Wei HUANG, Chih-Hung HUANG, Yang-Ann CHU, Hsu-Shui LIU, Jiun-Rong PAI
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Publication number: 20240363635Abstract: A semiconductor structure that includes a first semiconductor fin and a second semiconductor fin disposed over a substrate and adjacent to each other, a metal gate stack disposed over the substrate, and source/drain features disposed in each of the first semiconductor fin and the second semiconductor fin to engage with the metal gate stack. The metal gate stack includes a first region disposed over the first semiconductor fin, a second region disposed over the second semiconductor fin, and a third region connecting the first region to the second region in a continuous profile, where the first region is defined by a first gate length and the second region is defined by a second gate length less than the first gate length.Type: ApplicationFiled: July 11, 2024Publication date: October 31, 2024Inventors: Guan-Wei Huang, Yu-Shan Lu, Yu-Bey Wu, Jiun-Ming Kuo, Yuan-Ching Peng
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Patent number: 12125725Abstract: In certain embodiments, a workstation includes: a cleaning station configured to clean a die vessel, wherein the die vessel is configured to secure a semiconductor die; an inspection station configured to inspect the die vessel after cleaning to determine whether the die vessel is identified as passing inspection; and a conveyor configured to move the die vessel between the cleaning station and the inspection station.Type: GrantFiled: July 14, 2023Date of Patent: October 22, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Tsung-Sheng Kuo, Guan-Wei Huang, Chih-Hung Huang, Yang-Ann Chu, Hsu-Shui Liu, Jiun-Rong Pai
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Patent number: 12119272Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a single diffusion break (SDB) structure in the fin-shaped structure to divide the first fin-shaped structure into a first portion and a second portion, and more than two gate structures on the SDB structure. Preferably, the more than two gate structures include a first gate structure, a second gate structure, a third gate structure, and a fourth gate structure disposed on the SDB structure.Type: GrantFiled: August 14, 2023Date of Patent: October 15, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Fu-Jung Chuang, Po-Jen Chuang, Yu-Ren Wang, Chi-Mao Hsu, Chia-Ming Kuo, Guan-Wei Huang, Chun-Hsien Lin
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Publication number: 20240310870Abstract: A clock control circuit module, a memory storage device, and a clock control method are disclosed. The clock control circuit module is configured to: generate a clock signal; receive a first signal and the clock signal and sample the first signal according to the clock signal to generate a first sampling signal and a second sampling signal; obtain first position information corresponding to a first transition point of a first target signal and second position information corresponding to a second transition point of a second target signal according to the first sampling signal and the second sampling signal respectively; and evaluate a frequency shift status between the first signal and the clock signal according to the first position information and the second position information.Type: ApplicationFiled: April 25, 2023Publication date: September 19, 2024Applicant: PHISON ELECTRONICS CORP.Inventors: Shih-Yang Sun, Guan-Wei Wu
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Patent number: 12080715Abstract: A semiconductor structure that includes a first semiconductor fin and a second semiconductor fin disposed over a substrate and adjacent to each other, a metal gate stack disposed over the substrate, and source/drain features disposed in each of the first semiconductor fin and the second semiconductor fin to engage with the metal gate stack. The metal gate stack includes a first region disposed over the first semiconductor fin, a second region disposed over the second semiconductor fin, and a third region connecting the first region to the second region in a continuous profile, where the first region is defined by a first gate length and the second region is defined by a second gate length less than the first gate length.Type: GrantFiled: August 20, 2021Date of Patent: September 3, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Guan-Wei Huang, Yu-Shan Lu, Yu-Bey Wu, Jiun-Ming Kuo, Yuan-Ching Peng
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Publication number: 20240213067Abstract: A system and computer-implemented method are provided for manufacturing a semiconductor electronic device. An assembler receives a jig and a boat supporting a die. The assembler includes a separator that separates the jig into a first jig portion and a second jig portion and a loader that positions the boat between the first jig portion and the second jig portion. A robot receives an assembly prepared by the assembler and manipulates a locking system that fixes an alignment of the boat relative to the first jig portion and the second jig portion to form a locked assembly. A process chamber receives the locked assembly and subjects the locked assembly to a fabrication operation.Type: ApplicationFiled: March 11, 2024Publication date: June 27, 2024Inventors: Tsung-Sheng KUO, Chih-Hung HUANG, Guan-Wei HUANG, Ping-Yung YEN, Hsuan LEE, Jiun-Rong PAI
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Publication number: 20240162612Abstract: The present disclosure provides an electronic device. The electronic device includes a first transceiving element, a second transceiving element disposed over the first transceiving element, and a radiating structure configured to radiate a first EM wave having a lower frequency and a second EM wave having a higher frequency. The first transceiving element and the second transceiving element are collectively configured to provide a higher gain or bandwidth for the first EM wave than for the second EM wave.Type: ApplicationFiled: November 10, 2022Publication date: May 16, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Po-An LIN, Guan-Wei CHEN, Shih-Wen LU
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Patent number: 11929273Abstract: A system and computer-implemented method are provided for manufacturing a semiconductor electronic device. An assembler receives a jig and a boat supporting a die. The assembler includes a separator that separates the jig into a first jig portion and a second jig portion and a loader that positions the boat between the first jig portion and the second jig portion. A robot receives an assembly prepared by the assembler and manipulates a locking system that fixes an alignment of the boat relative to the first jig portion and the second jig portion to form a locked assembly. A process chamber receives the locked assembly and subjects the locked assembly to a fabrication operation.Type: GrantFiled: July 27, 2020Date of Patent: March 12, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITEDInventors: Tsung-Sheng Kuo, Chih-Hung Huang, Guan-Wei Huang, Ping-Yung Yen, Hsuan Lee, Jiun-Rong Pai
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Patent number: 11904482Abstract: A mechanical arm calibration system and a mechanical arm calibration method are provided. The method includes: locating a position of an end point of a mechanical arm in a three-dimensional space to calculate an actual motion trajectory of the end point when the mechanical arm is operating; retrieving link parameters of the mechanical arm, randomly generating sets of particles including compensation amounts for the link parameters through particle swarm optimization (PSO), importing the compensation amounts of each of the sets of particles into forward kinematics after addition of the corresponding link parameters, to calculate an adaptive motion trajectory of the end point; calculating position errors between the adaptive motion trajectory and the actual motion trajectory of each of the sets of particles for a fitness value of the PSO to estimate a group best position; and updating the link parameters by the compensation amounts corresponding to the group best position.Type: GrantFiled: April 1, 2021Date of Patent: February 20, 2024Assignee: Industrial Technology Research InstituteInventors: Jun-Yi Jiang, Yen-Cheng Chen, Chung-Yin Chang, Guan-Wei Su, Qi-Zheng Yang