Abstract: A semiconductor device structure is provided. The structure includes a semiconductor substrate and a gate stack over the semiconductor substrate. The structure also includes a sealing element extending along a sidewall of the gate stack. The sealing element has a first atomic layer and a second atomic layer, and the first atomic layer and the second atomic layer have different atomic concentrations of carbon. The structure further includes a spacer element over the sealing element.

Abstract: Semiconductor device structures having low-k features and methods of forming low-k features are described herein. Some examples relate to a surface modification layer, which may protect a low-k feature during subsequent processing. Some examples relate to gate spacers that include a low-k feature. Some examples relate to a low-k contact etch stop layer.

Abstract: Semiconductor device structures having low-k features and methods of forming low-k features are described herein. Some examples relate to a surface modification layer, which may protect a low-k feature during subsequent processing. Some examples relate to gate spacers that include a low-k feature. Some examples relate to a low-k contact etch stop layer. Example methods are described for forming such features.

Abstract: A method includes forming a first bond layer on a first wafer, and forming a first thermal conductive channel extending into the first bond layer. The first thermal conductive channel has a first thermal conductivity value higher than a second thermal conductivity value of the first bond layer. The method further includes forming a second bond layer on a second wafer, and forming a second thermal conductive channel extending into the second bond layer. The second thermal conductive channel has a third thermal conductivity value higher than a fourth thermal conductivity value of the second bond layer. The first wafer is bonded to the second wafer, and the first thermal conductive channel at least physically contacts the second thermal conductive channel. An interconnect structure is formed over the first wafer. The interconnect structure is electrically connected to integrated circuit devices in the first wafer.

Abstract: A semiconductor device includes a transistor structure disposed over a substrate, a first interlayer dielectric (ILD) layer disposed over the transistor structure, a second ILD layer disposed over the first ILD layer, and a first resistor wire disposed on the second ILD layer, and a second resistor wire disposed on the second ILD layer. A sheet resistance of the first resistor wire is different from a sheet resistance of the second resistor wire.

Abstract: A method includes forming a transistor over a front side of a substrate; forming a front-side interconnect structure over the transistor, the front-side interconnect structure comprising layers of conductive lines, and conductive vias interconnecting the layers of conductive lines; forming a first bonding layer over the front-side interconnect structure; forming a second bonding layer over a carrier substrate; bonding the front-side interconnect structure to the carrier substrate by pressing the first bonding layer against the second bonding layer; and forming a backside interconnect structure over a backside of the substrate after bonding the front-side interconnect structure to the carrier substrate.

Abstract: A semiconductor device structure is provided. The structure includes a semiconductor substrate and a gate stack over the semiconductor substrate. The structure also includes a sealing element extending along a sidewall of the gate stack. The sealing element has a first atomic layer and a second atomic layer, and the first atomic layer and the second atomic layer have different atomic concentrations of carbon. The structure further includes a spacer element over the sealing element.

Abstract: Semiconductor device structures having low-k features and methods of forming low-k features are described herein. Some examples relate to a surface modification layer, which may protect a low-k feature during subsequent processing. Some examples relate to gate spacers that include a low-k feature. Some examples relate to a low-k contact etch stop layer. Example methods are described for forming such features.

Abstract: A s semiconductor device structure is provided. The structure includes a semiconductor substrate and a gate stack over the semiconductor substrate. The structure also includes a spacer element extending along a sidewall of the gate stack. The spacer element has a first portion, a second portion, a third portion, and a fourth portion. Each of the first portion, the second portion, the third portion, and the fourth portion conformally extends along the sidewall of the gate stack. The second portion is sandwiched between the first portion and the third portion, and the third portion is sandwiched between the second portion and the fourth portion. Each of the first portion and the third portion has a first atomic concentration of carbon, and each of the second portion and the fourth portion has a second atomic concentration of carbon. The second atomic concentration of carbon is different than the first atomic concentration of carbon.

Abstract: Semiconductor device structures having low-k features and methods of forming low-k features are described herein. Some examples relate to a surface modification layer, which may protect a low-k feature during subsequent processing. Some examples relate to gate spacers that include a low-k feature. Some examples relate to a low-k contact etch stop layer. Example methods are described for forming such features.

Abstract: Semiconductor device structures having low-k features and methods of forming low-k features are described herein. Some examples relate to a surface modification layer, which may protect a low-k feature during subsequent processing. Some examples relate to gate spacers that include a low-k feature. Some examples relate to a low-k contact etch stop layer. Example methods are described for forming such features.

Abstract: A s semiconductor device structure is provided. The structure includes a semiconductor substrate and a gate stack over the semiconductor substrate. The structure also includes a spacer element extending along a sidewall of the gate stack. The spacer element has a first portion, a second portion, a third portion, and a fourth portion. Each of the first portion, the second portion, the third portion, and the fourth portion conformally extends along the sidewall of the gate stack. The second portion is sandwiched between the first portion and the third portion, and the third portion is sandwiched between the second portion and the fourth portion. Each of the first portion and the third portion has a first atomic concentration of carbon, and each of the second portion and the fourth portion has a second atomic concentration of carbon. The second atomic concentration of carbon is different than the first atomic concentration of carbon.

Abstract: Semiconductor device structures having low-k features and methods of forming low-k features are described herein. Some examples relate to a surface modification layer, which may protect a low-k feature during subsequent processing. Some examples relate to gate spacers that include a low-k feature. Some examples relate to a low-k contact etch stop layer. Example methods are described for forming such features.

Abstract: A structure and a formation method of a semiconductor device structure are provided. The method includes forming a gate stack over a semiconductor substrate and forming a sealing layer over a sidewall of the gate stack using an atomic layer deposition process in a process chamber. The atomic layer deposition process includes alternately and sequentially introducing a first precursor gas and a second precursor gas over the sidewall of the gate stack to form the sealing layer. The second precursor gas has a different atomic concentration of carbon than that of the first precursor gas. The atomic layer deposition process also includes removing a reaction byproduct from the process chamber after the first precursor gas is introduced and before the second precursor gas is introduced. The method also includes partially removing the sealing layer to form a sealing element over the sidewall of the gate stack.

Abstract: A structure and a formation method of a semiconductor device structure are provided. The method includes forming a gate stack over a semiconductor substrate and forming a sealing layer over a sidewall of the gate stack using an atomic layer deposition process in a process chamber. The atomic layer deposition process includes alternately and sequentially introducing a first precursor gas and a second precursor gas over the sidewall of the gate stack to form the sealing layer. The second precursor gas has a different atomic concentration of carbon than that of the first precursor gas. The atomic layer deposition process also includes removing a reaction byproduct from the process chamber after the first precursor gas is introduced and before the second precursor gas is introduced. The method also includes partially removing the sealing layer to form a sealing element over the sidewall of the gate stack.

Abstract: A structure and a formation method of a semiconductor device structure are provided. The method includes forming a gate stack over a semiconductor substrate. The method also includes forming a sealing layer over a sidewall of the gate stack using an atomic layer deposition process. The atomic layer deposition process includes alternately and sequentially introducing a first silicon-containing precursor gas and a second silicon-containing precursor gas over the sidewall of the gate stack to form the sealing layer. The second silicon-containing precursor gas has a different atomic concentration of carbon than that of the first silicon-containing precursor gas. The method further includes partially removing the sealing layer to form a sealing element over the sidewall of the gate stack.

Abstract: Semiconductor device structures having low-k features and methods of forming low-k features are described herein. Some examples relate to a surface modification layer, which may protect a low-k feature during subsequent processing. Some examples relate to gate spacers that include a low-k feature. Some examples relate to a low-k contact etch stop layer. Example methods are described for forming such features.

Abstract: Semiconductor device structures having low-k features and methods of forming low-k features are described herein. Some examples relate to a surface modification layer, which may protect a low-k feature during subsequent processing. Some examples relate to gate spacers that include a low-k feature. Some examples relate to a low-k contact etch stop layer. Example methods are described for forming such features.

Abstract: A structure and a formation method of a semiconductor device structure are provided. The method includes forming a gate stack over a semiconductor substrate. The method also includes forming a sealing layer over a sidewall of the gate stack using an atomic layer deposition process. The atomic layer deposition process includes alternately and sequentially introducing a first silicon-containing precursor gas and a second silicon-containing precursor gas over the sidewall of the gate stack to form the sealing layer. The second silicon-containing precursor gas has a different atomic concentration of carbon than that of the first silicon-containing precursor gas. The method further includes partially removing the sealing layer to form a sealing element over the sidewall of the gate stack.

Abstract: Semiconductor device structures having low-k features and methods of forming low-k features are described herein. Some examples relate to a surface modification layer, which may protect a low-k feature during subsequent processing. Some examples relate to gate spacers that include a low-k feature. Some examples relate to a low-k contact etch stop layer. Example methods are described for forming such features.