Abstract: The present disclosure provides a pixel circuit with pulse width compensation, and the pixel circuit includes a pulse width modulation circuit and a pulse amplitude modulation circuit, and the pulse amplitude modulation circuit is electrically connected to the pulse width modulation circuit. The pulse width modulation circuit includes a P-type pulse width compensation transistor and a first P-type control transistor, and the first P-type control transistor is electrically connected to the P-type pulse width compensation transistor. The pulse amplitude modulation circuit includes a second P-type control transistor, a first capacitor, a P-type driving transistor and a light-emitting element. The second P-type control transistor is electrically connected to the first P-type control transistor. The first capacitor is electrically connected to the second P-type control transistor.

Abstract: The present disclosure provides a scan driving circuit, which includes a pull-up output charging circuit, a pull-down discharge circuit, a pre-charge circuit, an anti-noise start-up circuit and an anti-noise pull-down discharge circuit. The pull-up output charging circuit is electrically connected to an output terminal, and the pull-down discharge circuit is electrically connected to the output terminal. The pre-charge circuit is electrically connected to the pull-up output charging circuit and the pull-down discharge circuit through a driving node. The anti-noise start-up circuit is electrically connected to the pre-charge circuit. The anti-noise pull-down discharge circuit is electrically connected to the anti-noise start-up circuit, and the anti-noise pull-down discharge circuit is electrically connected to the driving node.

Abstract: The present disclosure provides a scan driving circuit, which includes a pull-up output charging circuit, a pull-down discharge circuit, a pre-charge circuit, an anti-noise start-up circuit and an anti-noise pull-down discharge circuit. The pull-up output charging circuit is electrically connected to an output terminal, and the pull-down discharge circuit is electrically connected to the output terminal. The pre-charge circuit is electrically connected to the pull-up output charging circuit and the pull-down discharge circuit through a driving node. The anti-noise start-up circuit is electrically connected to the pre-charge circuit. The anti-noise pull-down discharge circuit is electrically connected to the anti-noise start-up circuit, and the anti-noise pull-down discharge circuit is electrically connected to the driving node.

Abstract: A single-stage gate driving circuit with multiple outputs includes a first bootstrapping circuit, a first pre-charge circuit, a first output control circuit, a second bootstrapping circuit, a second pre-charge circuit, and a second output control circuit. During a first duration, the first pre-charge circuit precharges a first node to a first voltage. During a second duration, the first bootstrapping circuit boosts the first node from the first voltage to a second voltage, and the second pre-charge circuit precharges a second node to a fourth voltage. During a third duration, the first output control circuit boosts the first node from the second voltage to a third voltage, and the second bootstrapping circuit boosts the second node from the fourth voltage to a fifth voltage. During a fourth duration, the second output control circuit boosts the second node from the fifth voltage to a sixth voltage.

Abstract: A gate driving circuit includes a bootstrapping circuit, a pre-charge circuit, and an output control circuit. The bootstrapping circuit is composed of a bootstrapping capacitor and a transistor. A first terminal of the bootstrapping capacitor has a first voltage during a first duration. The pre-charge circuit is connected to the first terminal of the bootstrapping capacitor. The pre-charge circuit boosts the first terminal of the bootstrapping capacitor from the first voltage to a second voltage during a second duration. The bootstrapping circuit boosts the first terminal of the bootstrapping capacitor from the second voltage to a third voltage during a third duration. The output control circuit is connected to the first terminal of the bootstrapping capacitor. The output control circuit boosts the first terminal of the bootstrapping capacitor from the third voltage to a fourth voltage during a fourth duration.

Abstract: A gate driving circuit includes a bootstrapping circuit, a pre-charge circuit, and an output control circuit. The bootstrapping circuit is composed of a bootstrapping capacitor and a transistor. A first terminal of the bootstrapping capacitor has a first voltage during a first duration. The pre-charge circuit is connected to the first terminal of the bootstrapping capacitor. The pre-charge circuit boosts the first terminal of the bootstrapping capacitor from the first voltage to a second voltage during a second duration. The bootstrapping circuit boosts the first terminal of the bootstrapping capacitor from the second voltage to a third voltage during a third duration. The output control circuit is connected to the first terminal of the bootstrapping capacitor. The output control circuit boosts the first terminal of the bootstrapping capacitor from the third voltage to a fourth voltage during a fourth duration.

Abstract: A single-stage gate driving circuit with multiple outputs includes a first bootstrapping circuit, a first pre-charge circuit, a first output control circuit, a second bootstrapping circuit, a second pre-charge circuit, and a second output control circuit. During a first duration, the first pre-charge circuit precharges a first node to a first voltage. During a second duration, the first bootstrapping circuit boosts the first node from the first voltage to a second voltage, and the second pre-charge circuit precharges a second node to a fourth voltage. During a third duration, the first output control circuit boosts the first node from the second voltage to a third voltage, and the second bootstrapping circuit boosts the second node from the fourth voltage to a fifth voltage. During a fourth duration, the second output control circuit boosts the second node from the fifth voltage to a sixth voltage.

Abstract: The present invention provides a temperature sensing circuit, which comprises a switching circuit, a charging circuit, and a judging circuit. The switching circuit receives a supply voltage for generating a switching signal. The charging circuit is coupled to the switching circuit and receives the supply voltage. The switching signal controls the charging circuit for generating a voltage signal according to the supply voltage. The judging circuit is coupled to the charging circuit for generating a judging signal according to the level of the voltage signal. The levels of the switching signal and the voltage signal are related to a temperature state; and the judging signal represents the temperature state. The temperature sensing circuit can be applied to the driving circuit of a display panel for detecting the temperature state. Hence, the level of the driving signal of the driving circuit can be adjusted for improving the image quality.

Abstract: A gate driving circuit is provided. The gate driving circuit includes multistage driving modules, where an Nth stage driving module includes a setting circuit, a first driving circuit, an isolating switch circuit, a second driving circuit and an anti-noise circuit. The setting circuit generates a first precharge signal according to a gate driving signal of an (N?2)th scan line or a start signal. The isolating switch circuit coupled between the first driving circuit and the second driving circuit provides a second precharge signal, so as to effectively avoid a flickering problem of a display image caused by a surge of the gate driving signal due to a coupling effect of a parasitic capacitance of the transistor and a bootstrap capacitor, and meanwhile the bootstrap capacitor is not used, so as to effectively reduce a bezel area.

Abstract: A gate driving circuit is provided. The gate driving circuit includes multistage driving modules, where an Nth stage driving module includes a setting circuit, a first driving circuit, an isolating switch circuit, a second driving circuit and an anti-noise circuit. The setting circuit generates a first precharge signal according to a gate driving signal of an (N?2)th scan line or a start signal. The isolating switch circuit coupled between the first driving circuit and the second driving circuit provides a second precharge signal, so as to effectively avoid a flickering problem of a display image caused by a surge of the gate driving signal due to a coupling effect of a parasitic capacitance of the transistor and a bootstrap capacitor, and meanwhile the bootstrap capacitor is not used, so as to effectively reduce a bezel area.

Abstract: A display panel includes a substrate, and a pixel array and a gate driving circuit. The gate driving circuit provides gate driving signals to the pixel array, and includes shift registers, wherein each shift register includes a voltage providing unit, a first driving transistor, a voltage transmitting unit and a second driving transistor. The voltage providing unit receives a setting signal and a system high voltage to provide a first terminal voltage. The first driving transistor receives a first clock signal and the first terminal voltage to provide a first gate driving signal. The voltage transmitting unit receives the first gate driving signal to provide a second terminal voltage. The second driving transistor receives a second clock signal and the second terminal voltage to provide a second gate driving signal. Therefore, the influence caused by large difference of driving capabilities of the first and the second driving transistor is avoided.

Abstract: A display panel includes a substrate, and a pixel array and a gate driving circuit. The gate driving circuit provides gate driving signals to the pixel array, and includes shift registers, wherein each shift register includes a voltage providing unit, a first driving transistor, a voltage transmitting unit and a second driving transistor. The voltage providing unit receives a setting signal and a system high voltage to provide a first terminal voltage. The first driving transistor receives a first clock signal and the first terminal voltage to provide a first gate driving signal. The voltage transmitting unit receives the first gate driving signal to provide a second terminal voltage. The second driving transistor receives a second clock signal and the second terminal voltage to provide a second gate driving signal. Therefore, the influence caused by large difference of driving capabilities of the first and the second driving transistor is avoided.

Abstract: A pixel circuit includes first to third switches, a transistor, a light emitting diode, and first and second capacitors. The first switch has its control end coupled to a first scan line and its first end for receiving a data signal. The second switch has its control end coupled to a second scan line and its third end for receiving a power supply voltage. The transistor has its control end coupled to the second end and its fifth end coupled to the fourth end. The third switch has its control end coupled to a third scan line and its eighth end coupled to the sixth end. the light emitting diode has its anode and cathode coupled to the eighth end and a reference voltage level, respectively. The first and second capacitors are coupled between the second end and seventh end and between the seventh end and reference voltage level, respectively.

Abstract: The present invention provides a temperature sensing circuit, which comprises a switching circuit, a charging circuit, and a judging circuit. The switching circuit receives a supply voltage for generating a switching signal. The charging circuit is coupled to the switching circuit and receives the supply voltage. The switching signal controls the charging circuit for generating a voltage signal according to the supply voltage. The judging circuit is coupled to the charging circuit for generating a judging signal according to the level of the voltage signal. The levels of the switching signal and the voltage signal are related to a temperature state; and the judging signal represents the temperature state. The temperature sensing circuit can be applied to the driving circuit of a display panel for detecting the temperature state. Hence, the level of the driving signal of the driving circuit can be adjusted for improving the image quality.

Abstract: The invention provides a bidirectional scanning driving circuit, which comprises N stages of driving modules. Driving module comprises an output unit, a forward input unit, and a reverse input unit. For the n-th stage driving module, the forward input unit receives a first input voltage and a front forward scan signal of any of the driving modules lower than or equal to (n?2)th stage for charging or discharging a control node of the output unit. The reverse input unit receives a second input voltage and a back reverse scan signal of any of the driving modules higher than or equal to (n+2)th stage for charging or discharging the control node of the output unit. When the forward input unit is charging the output unit, the output unit outputs a forward scan signal; when the reverse input unit is charging the output unit, the output unit outputs a reverse scan signal.

Abstract: The invention provides a bidirectional scanning driving circuit, which comprises N stages of driving modules. Driving module comprises an output unit, a forward input unit, and a reverse input unit. For the n-th stage driving module, the forward input unit receives a first input voltage and a front forward scan signal of any of the driving modules lower than or equal to (n?2)th stage for charging or discharging a control node of the output unit. The reverse input unit receives a second input voltage and a back reverse scan signal of any of the driving modules higher than or equal to (n+2)th stage for charging or discharging the control node of the output unit. When the forward input unit is charging the output unit, the output unit outputs a forward scan signal; when the reverse input unit is charging the output unit, the output unit outputs a reverse scan signal.

Abstract: The present invention provides an analog memory cell circuit for the LTPS TFT-LCD. The circuit comprises the first transistor, second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the capacitor. It comprises a plurality of operation period, wherein the transistors are controlled in accordance with the first scan signal, the second scan signal, and the third scan signal, the output signal is output in the opposite to the output jack.

Abstract: The present invention provides an analog memory cell circuit for the LTPS TFT-LCD. The circuit comprises the first transistor, second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the capacitor. It comprises a plurality of operation period, wherein the transistors are controlled in accordance with the first scan signal, the second scan signal, and the third scan signal, the output signal is output in the opposite to the output jack.