Patents by Inventor GUANGCAI FU

GUANGCAI FU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12121873
    Abstract: The present disclosure provides a gas-solid separation structure including: a feeding pipeline including a first feeding part, a second feeding part and a first valve disposed between the first and second feeding parts; a discharge pipeline having a first opening and a second opening opposite to each other, the second feeding part extending into the discharge pipeline via the first opening; wherein an exhaust channel is formed between the second feeding part and the discharge pipeline, exhaust holes are formed in a portion of the discharge pipeline opposite to the second feeding part, and the exhaust channel is in communication with the exhaust holes. The present disclosure further provides a feeding device and an electrochemical deposition apparatus. The present disclosure can improve the problem of interference with medicine powder release caused by gases entering the discharge pipeline.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: October 22, 2024
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Shaodong Sun, Junwei Yan, Guangcai Yuan, Guocai Zhang, Shihao Dong, Lilei Zhang, Haoran Gao, Wenyue Fu, Chengfei Wang, Xiaojie Pan
  • Publication number: 20240162330
    Abstract: The present application discloses a method for manufacturing a metal zero layer, comprising: step 1, etching a zero interlayer film to form a first trench; step 2, performing first Ge ion implantation to form a first Ge layer in the zero interlayer film and achieve first amorphization; step 3, performing second Ge ion implantation to form a second Ge layer in the zero interlayer film and achieve second amorphization, wherein the depth of the second Ge layer is greater than the depth of the first Ge layer, and the second Ge ion implantation is tilt ion implantation; step 4, forming a metal silicide layer on the surface of an amorphous silicon layer in a self-aligned manner; step 5, filling the first trench with a first metal layer; and step 6, performing chemical mechanical polishing to fully remove the first metal layer outside the first trench and achieve planarization.
    Type: Application
    Filed: June 27, 2023
    Publication date: May 16, 2024
    Applicant: Shanghai Huali Integrated Circuit Corporation
    Inventors: Haibo LEI, Guangcai FU, Qi SHAO, Binbin ZHA
  • Patent number: 11510011
    Abstract: A microphone and its manufacturing method, relating the semiconductor techniques, are presented. The microphone comprises: a substrate comprising an opening, a first electrode layer at the bottom of the opening, and at least one groove adjacent to the first electrode layer, with the groove and the opening on two opposing sides of a bottom surface of the first electrode layer; a separation material layer filling the groove; and a second electrode layer on the separation material layer, wherein the first electrode layer, the separation material layer, and the second electrode layer form a cavity. In this inventive concept, the separation material layer on the groove works as an anchor node embedding in the substrate to increases the effective contact area and the bonding power, and to improve the bonding quality between the second electrode layer and the substrate, which results in a strengthened second electrode layer.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: November 22, 2022
    Inventor: GuangCai Fu
  • Publication number: 20210021938
    Abstract: A microphone and its manufacturing method, relating the semiconductor techniques, are presented. The microphone comprises: a substrate comprising an opening, a first electrode layer at the bottom of the opening, and at least one groove adjacent to the first electrode layer, with the groove and the opening on two opposing sides of a bottom surface of the first electrode layer; a separation material layer filling the groove; and a second electrode layer on the separation material layer, wherein the first electrode layer, the separation material layer, and the second electrode layer form a cavity. In this inventive concept, the separation material layer on the groove works as an anchor node embedding in the substrate to increases the effective contact area and the bonding power, and to improve the bonding quality between the second electrode layer and the substrate, which results in a strengthened second electrode layer.
    Type: Application
    Filed: October 1, 2020
    Publication date: January 21, 2021
    Inventor: GuangCai FU
  • Patent number: 10834509
    Abstract: A microphone and its manufacturing method, relating the semiconductor techniques, are presented. The microphone comprises: a substrate comprising an opening, a first electrode layer at the bottom of the opening, and at least one groove adjacent to the first electrode layer, with the groove and the opening on two opposing sides of a bottom surface of the first electrode layer; a separation material layer filling the groove; and a second electrode layer on the separation material layer, wherein the first electrode layer, the separation material layer, and the second electrode layer form a cavity. In this inventive concept, the separation material layer on the groove works as an anchor node embedding in the substrate to increases the effective contact area and the bonding power, and to improve the bonding quality between the second electrode layer and the substrate, which results in a strengthened second electrode layer.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: November 10, 2020
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventor: GuangCai Fu
  • Patent number: 10633247
    Abstract: A semiconductor device and its manufacturing method, relating the semiconductor techniques. The semiconductor device manufacturing method comprises: providing a first semiconductor structure, wherein the first semiconductor structure comprises a first part comprising a plurality of films separated from each other, and a first bonding component on the first part; forming an anti-stick layer on the first part covering the plurality of films; providing a second semiconductor structure comprising a second part and a second bonding component on the second part; and bonding the first bonding component with the second bonding component, so that the first part is bonded to the second part. This inventive concept prevents the adhesion of neighboring films in a semiconductor device.
    Type: Grant
    Filed: June 5, 2019
    Date of Patent: April 28, 2020
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventor: GuangCai Fu
  • Patent number: 10629808
    Abstract: A method for forming a phase change random access memory is provided. The method includes providing a substrate having a surface; and forming a dielectric layer on the surface of the substrate. The method also includes forming a through-hole penetrating through the dielectric layer; and forming an adhesion layer on inner surface of the through-hole. Further, the method includes forming a metal layer doped with inorganic ions on the adhesion layer to reduce over-etching of the metal layer and increase heating efficiency of the metal layer on the surface of the adhesion layer; and forming a phase change layer on the dielectric layer, the adhesion layer and the doped metal layer.
    Type: Grant
    Filed: July 30, 2015
    Date of Patent: April 21, 2020
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Zhichao Li, Guangcai Fu
  • Publication number: 20190284044
    Abstract: A semiconductor device and its manufacturing method, relating the semiconductor techniques. The semiconductor device manufacturing method comprises: providing a first semiconductor structure, wherein the first semiconductor structure comprises a first part comprising a plurality of films separated from each other, and a first bonding component on the first part; forming an anti-stick layer on the first part covering the plurality of films; providing a second semiconductor structure comprising a second part and a second bonding component on the second part; and bonding the first bonding component with the second bonding component, so that the first part is bonded to the second part. This inventive concept prevents the adhesion of neighboring films in a semiconductor device.
    Type: Application
    Filed: June 5, 2019
    Publication date: September 19, 2019
    Inventor: GuangCai FU
  • Patent number: 10351421
    Abstract: A semiconductor device and its manufacturing method, relating the semiconductor techniques. The semiconductor device manufacturing method comprises: providing a first semiconductor structure, wherein the first semiconductor structure comprises a first part comprising a plurality of films separated from each other, and a first bonding component on the first part; forming an anti-stick layer on the first part covering the plurality of films; providing a second semiconductor structure comprising a second part and a second bonding component on the second part; and bonding the first bonding component with the second bonding component, so that the first part is bonded to the second part. This inventive concept prevents the adhesion of neighboring films in a semiconductor device.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: July 16, 2019
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventor: GuangCai Fu
  • Publication number: 20180279058
    Abstract: A microphone and its manufacturing method, relating the semiconductor techniques, are presented. The microphone comprises: a substrate comprising an opening, a first electrode layer at the bottom of the opening, and at least one groove adjacent to the first electrode layer, with the groove and the opening on two opposing sides of a bottom surface of the first electrode layer; a separation material layer filling the groove; and a second electrode layer on the separation material layer, wherein the first electrode layer, the separation material layer, and the second electrode layer form a cavity. In this inventive concept, the separation material layer on the groove works as an anchor node embedding in the substrate to increases the effective contact area and the bonding power, and to improve the bonding quality between the second electrode layer and the substrate, which results in a strengthened second electrode layer.
    Type: Application
    Filed: March 19, 2018
    Publication date: September 27, 2018
    Inventor: GuangCai Fu
  • Publication number: 20180265352
    Abstract: A semiconductor device and its manufacturing method, relating the semiconductor techniques. The semiconductor device manufacturing method comprises: providing a first semiconductor structure, wherein the first semiconductor structure comprises a first part comprising a plurality of films separated from each other, and a first bonding component on the first part; forming an anti-stick layer on the first part covering the plurality of films; providing a second semiconductor structure comprising a second part and a second bonding component on the second part; and bonding the first bonding component with the second bonding component, so that the first part is bonded to the second part. This inventive concept prevents the adhesion of neighboring films in a semiconductor device.
    Type: Application
    Filed: March 16, 2018
    Publication date: September 20, 2018
    Inventor: GuangCai FU
  • Patent number: 9875965
    Abstract: Semiconductor devices and fabrication methods are provided. In a semiconductor device, a semiconductor substrate includes a first electrode layer having a top surface coplanar with a top surface of the semiconductor substrate. A sacrificial layer is formed on the semiconductor substrate and the first electrode layer. A first mask layer made of a conductive material is formed on the sacrificial layer. The first mask layer and the sacrificial layer are etched until a surface of the first electrode layer is exposed to form openings through the first mask layer and the sacrificial layer. A cleaning process is performed to remove etch byproducts adhered to a surface of the first mask layer and adhered to sidewalls and bottom surfaces of the openings. Conductive plugs are formed in the openings after the cleaning process.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: January 23, 2018
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Guangcai Fu, Tianlun Yang, Xiaoping Zhang
  • Patent number: 9751750
    Abstract: A semiconductor device having a capacitive pressure sensor structure includes a substrate, an interlayer dielectric layer on the substrate, a bottom electrode of a pressure sensor within the interlayer dielectric layer, a pressure sensing cavity above the bottom electrode, a sensing film above the pressure sensing cavity and covering a portion of the interlayer dielectric layer, a cover layer on the interlayer dielectric layer and on the sensing film, the cover layer having an opening exposing a portion of the sensing film, and a high thermal expansion coefficient material layer disposed on cover layer and sidewalls of the opening. Through the use of the high thermal expansion coefficient material layer, the capacitive pressure sensor structure is not susceptible to changes in ambient temperature to enhance the sensitivity of the capacitive pressure sensor structure.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: September 5, 2017
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Xianming Zhang, Guangcai Fu
  • Patent number: 9573805
    Abstract: A method of manufacturing a pressure sensor is provided. The method includes: providing a substrate, wherein a bottom electrode and a pressure sensing film are disposed on the substrate; forming an etch stop assembly on the pressure sensing film at a location corresponding to a pressure trench; forming a cover layer on the substrate covering the etch stop assembly and the pressure sensing film; forming a mask layer on the cover layer, wherein an opening of the mask layer is formed above the etch stop assembly and exposes a portion of the cover layer at the location corresponding to the pressure trench; etching the cover layer using the mask layer so as to form the pressure trench in the cover layer; removing the etch stop assembly at a bottom of the pressure trench; and removing the mask layer.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: February 21, 2017
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Guangcai Fu, Haiyong Ni
  • Publication number: 20160322303
    Abstract: Semiconductor devices and fabrication methods are provided. In a semiconductor device, a semiconductor substrate includes a first electrode layer having a top surface coplanar with a top surface of the semiconductor substrate. A sacrificial layer is formed on the semiconductor substrate and the first electrode layer. A first mask layer made of a conductive material is formed on the sacrificial layer. The first mask layer and the sacrificial layer are etched until a surface of the first electrode layer is exposed to form openings through the first mask layer and the sacrificial layer. A cleaning process is performed to remove etch byproducts adhered to a surface of the first mask layer and adhered to sidewalls and bottom surfaces of the openings. Conductive plugs are formed in the openings after the cleaning process.
    Type: Application
    Filed: July 14, 2016
    Publication date: November 3, 2016
    Inventors: GUANGCAI FU, TIANLUN YANG, XIAOPING ZHANG
  • Patent number: 9416004
    Abstract: Semiconductor devices and fabrication methods are provided. In a semiconductor device, a semiconductor substrate includes a first electrode layer having a top surface coplanar with a top surface of the semiconductor substrate. A sacrificial layer is formed on the semiconductor substrate and the first electrode layer. A first mask layer made of a conductive material is formed on the sacrificial layer. The first mask layer and the sacrificial layer are etched until a surface of the first electrode layer is exposed to form openings through the first mask layer and the sacrificial layer. A cleaning process is performed to remove etch byproducts adhered to a surface of the first mask layer and adhered to sidewalls and bottom surfaces of the openings. Conductive plugs are formed in the openings after the cleaning process.
    Type: Grant
    Filed: January 13, 2015
    Date of Patent: August 16, 2016
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Guangcai Fu, Tianlun Yang, Xiaoping Zhang
  • Publication number: 20160064657
    Abstract: A method for forming a phase change random access memory is provided. The method includes providing a substrate having a surface; and forming a dielectric layer on the surface of the substrate. The method also includes forming a through-hole penetrating through the dielectric layer; and forming an adhesion layer on inner surface of the through-hole. Further, the method includes forming a metal layer doped with inorganic ions on the adhesion layer to reduce over-etching of the metal layer and increase heating efficiency of the metal layer on the surface of the adhesion layer; and forming a phase change layer on the dielectric layer, the adhesion layer and the doped metal layer.
    Type: Application
    Filed: July 30, 2015
    Publication date: March 3, 2016
    Inventors: ZHICHAO LI, GUANGCAI FU
  • Publication number: 20160009546
    Abstract: A semiconductor device having a capacitive pressure sensor structure includes a substrate, an interlayer dielectric layer on the substrate, a bottom electrode of a pressure sensor within the interlayer dielectric layer, a pressure sensing cavity above the bottom electrode, a sensing film above the pressure sensing cavity and covering a portion of the interlayer dielectric layer, a cover layer on the interlayer dielectric layer and on the sensing film, the cover layer having an opening exposing a portion of the sensing film, and a high thermal expansion coefficient material layer disposed on cover layer and sidewalls of the opening. Through the use of the high thermal expansion coefficient material layer, the capacitive pressure sensor structure is not susceptible to changes in ambient temperature to enhance the sensitivity of the capacitive pressure sensor structure.
    Type: Application
    Filed: May 13, 2015
    Publication date: January 14, 2016
    Inventors: XIANMING ZHANG, GUANGCAI FU
  • Publication number: 20150368096
    Abstract: A method of manufacturing a pressure sensor is provided. The method includes: providing a substrate, wherein a bottom electrode and a pressure sensing film are disposed on the substrate; forming an etch stop assembly on the pressure sensing film at a location corresponding to a pressure trench; forming a cover layer on the substrate covering the etch stop assembly and the pressure sensing film; forming a mask layer on the cover layer, wherein an opening of the mask layer is formed above the etch stop assembly and exposes a portion of the cover layer at the location corresponding to the pressure trench; etching the cover layer using the mask layer so as to form the pressure trench in the cover layer; removing the etch stop assembly at a bottom of the pressure trench; and removing the mask layer.
    Type: Application
    Filed: May 15, 2015
    Publication date: December 24, 2015
    Inventors: Guangcai FU, Haiyong NI
  • Publication number: 20150203351
    Abstract: Semiconductor devices and fabrication methods are provided. In a semiconductor device, a semiconductor substrate includes a first electrode layer having a top surface coplanar with a top surface of the semiconductor substrate. A sacrificial layer is formed on the semiconductor substrate and the first electrode layer. A first mask layer made of a conductive material is formed on the sacrificial layer. The first mask layer and the sacrificial layer are etched until a surface of the first electrode layer is exposed to form openings through the first mask layer and the sacrificial layer. A cleaning process is performed to remove etch byproducts adhered to a surface of the first mask layer and adhered to sidewalls and bottom surfaces of the openings. Conductive plugs are formed in the openings after the cleaning process.
    Type: Application
    Filed: January 13, 2015
    Publication date: July 23, 2015
    Inventors: GUANGCAI FU, TIANLUN YANG, XIAOPING ZHANG