Abstract: A manufacturing method for a package substrate, the method including: forming a package substrate by a first dielectric layer formed by weaving at least fiberglass of a first width and a second dielectric layer formed by weaving at least fiberglass of a second width. The second width is different from the first width, and the weaving direction of the fiberglass in the first dielectric layer is 90° relative to the weaving direction of the fiberglass in the second dielectric layer.

Abstract: A camera assembly includes a time-of-flight module and a circuit board. The circuit board is provided with an avoidance space. The time-of-flight module includes a transmit module and a receive module. The transmit module is configured to emit a detection optical signal. The receive module is configured to receive an induction optical signal formed after the detection optical signal is reflected by a to-be-measured object. The receive module is located in the avoidance space. A connection end of the receive module is fixed to the circuit board. The transmit module is located around the receive module and fixed to the circuit board.

Abstract: The present disclosure provides a package substrate structure and a method for manufacturing the same. The method includes: providing a substrate, forming a first hole with a first radial dimension in the substrate; forming a first metal layer on the sidewall of the first via to form a first via; filing the first via with a dielectric layer; forming a second hole with a second radial dimension in the dielectric layer, wherein the second radial dimension is smaller than the first radial dimension, and the second hole and the first metal layer are separated by the dielectric layer; filling the second hole with the second metal layer to form a second via. The high-speed circuit via design achieved by a sleeve via arrangement of the present disclosure can reduce the influence of the impedance mismatch caused by vias on insertion loss and the return loss in a specific frequency band.

Abstract: A method for manufacturing an electrical performance test structure of packaged chip, and a method for testing electrical performance of packaged chip, including: providing a first wafer and a second wafer, forming a top metal layer on the first wafer and the second wafer respectively, forming bumps on part of the top metal layer of the first wafer and on part of the top metal layer of the second wafer respectively, removing the top metal layer that is not directly beneath the bumps in the first wafer, and completely retaining the top metal layer in the second wafer, and packaging the first wafer to a first die and packaging the second wafer to a second die, wherein the second die is used as a test structure, and the electrical performance of the second die is used as a reference for electrical performance of the first die.

Abstract: The application discloses a method for manufacturing an electrical performance test structure of packaged chip, and a method for testing electrical performance of packaged chip, including: providing a first wafer and a second wafer, forming a top metal layer on the first wafer and the second wafer respectively, forming bumps on part of the top metal layer of the first wafer and on part of the top metal layer of the second wafer respectively, removing the top metal layer that is not directly beneath the bumps in the first wafer, and completely retaining the top metal layer in the second wafer, and packaging the first wafer to a first die and packaging the second wafer to a second die, wherein the second die is used as a test structure, and the electrical performance of the second die is used as a reference for electrical performance of the first die.

Abstract: A package substrate and a manufacturing method thereof, the method including: forming a package substrate by a first dielectric layer formed by weaving at least fiberglass of a first width and a second dielectric layer formed by weaving at least fiberglass of a second width. The second width is different from the first width, and the weaving direction of the fiberglass in the first dielectric layer is 90° relative to the weaving direction of the fiberglass in the second dielectric layer.

Abstract: A camera assembly includes a time-of-flight module and a circuit board. The circuit board is provided with an avoidance space. The time-of-flight module includes a transmit module and a receive module. The transmit module is configured to emit a detection optical signal. The receive module is configured to receive an induction optical signal formed after the detection optical signal is reflected by a to-be-measured object. The receive module is located in the avoidance space. A connection end of the receive module is fixed to the circuit board. The transmit module is located around the receive module and fixed to the circuit board.

Abstract: An automatic rubber powder plasticizing method which is used for recovery, processing and utilization of waste rubber, comprising the following steps: smash the waste rubber to powder in 10 meshes to 40 meshes, add some activator and softer according to certain weight ratio of rubber powder:activator:softener=1:0.3˜0.4%:8˜18%, evenly mix them, and then heat the mixture to 180˜320° C. and hold for 8˜15 min, afterwards, carry out desulfurization and plasticizing, then the plasticized rubber powder is obtained after cooling the resultant mixture. The invention also provides an apparatus for plasticizing which comprises a stirring unit (1), a feeding unit (2), a thermal reaction unit (3) and a cooling unit (4).